Integration Manual

SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R11 Design-in Page 73 of 157
C5
GND plane
VCC line
Capacit or wit h
SRF ~900 MHz
C1 C3 C4
FB1
Ferrit e Bead
for GHz noise
C2
C1
GND
C2 C4
SARA-R4/N4
52
VCC
53
VCC
51
VCC
3V8
C5
+
FB1
C3
Capacit or wit h
SRF ~1900 MHz
SARA
Figure 27: Suggested design to reduce ripple / noise on VCC, highly recommended when using an integrated antenna
Reference
Description
Part Number - Manufacturer
C1
68 pF Capacitor Ceramic C0G 0402 5% 50 V
GRM1555C1H680JA01 - Murata
C2
15 pF Capacitor Ceramic C0G 0402 5% 50 V
GRM1555C1H150JA01 - Murata
C3
10 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R71C103KA01 - Murata
C4
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R71C104KA01 - Murata
C5
100 µF Capacitor Tantalum B_SIZE 20% 6.3V 15m
T520B107M006ATE015 – Kemet
10 µF Capacitor Ceramic X5R 0603 20% 6.3 V
GRM188R60J106ME47 - Murata
FB1
Chip Ferrite Bead EMI Filter for GHz Band Noise
220  at 100 MHz, 260  at 1 GHz, 2000 mA
BLM18EG221SN1 - Murata
Table 19: Suggested components to reduce ripple / noise on VCC
☞ The necessity of each part depends on the specific design, but it is recommended to provide all the
parts described in Figure 27 / Table 19 if the application device integrates an internal antenna.
☞ ESD sensitivity rating of the VCC supply pins is 1 kV (HBM according to JESD22-A114). Higher protection
level can be required if the line is externally accessible on the application board, e.g. if accessible battery
connector is directly connected to the supply pins. Higher protection level can be achieved by mounting
an ESD protection (e.g. EPCOS CA05P4S14THSG varistor) close to accessible point.
2.2.1.11 Guidelines for VCC supply layout design
Good connection of the module VCC pins with DC supply source is required for correct RF performance.
Guidelines are summarized in the following list:
 All the available VCC pins must be connected to the DC source
 VCC connection must be as wide as possible and as short as possible
 Any series component with Equivalent Series Resistance (ESR) greater than few milliohms must be
avoided
 VCC connection must be routed through a PCB area separated from RF lines / parts, sensitive analog
signals and sensitive functional units: it is good practice to interpose at least one layer of PCB ground
between the VCC track and other signal routing