Integration Manual

JODY-W3 series - System integration manual
UBX-19011209 - R07 System description Page 17 of 71
C2-Restricted
Name
I/O
Description
Power supply
PCIE_PERST#
I
PCIe host indication to reset the device.
Active low.
Multiplexed with GPIO[20].
VIO
PCIE_CLKREQ#
OD
PCIe clock request signal which indicates when the REFCLK to the
PCIe interface can be gated.
1 = the clock can be gated.
0 = the clock is required.
Active low.
An external pull-up resistor on host side is required.
VIO
PCIE_PME#
OD
PCI wake signal.
Active low.
An external pull-up resistor on host side is required.
VIO
PCIE_RDN
I
PCIe receiver differential pair.
220 nF AC coupling capacitors should be placed close to the host
TDN/TDP outputs.
1V8
PCIE_RDP
I
PCIE_TDN
O
PCIe transmitter differential pair.
220 nF AC coupling capacitors are included on the module.
1V8
PCIE_TDP
O
PCIE_REFCLKN
I
PCIe 100 MHz differential clock inputs.
HCSL voltage levels.
1V8
PCIE_REFCLKP
I
Table 10: PCIe signal descriptions
1.5.3 High-speed UART interface
JODY-W3 series modules support a high-speed Universal Asynchronous Receiver/Transmitter
(UART) interface in compliance with the industry standard 16550 specification.
The main features of the UART interface include:
• FIFO mode permanently selected for transmit and receive operations
• Two pins for transmit and receive operations
• Two flow control pins (RTS/CTS)
• Interrupt triggers for low-power, high-throughput operation
• Supports standard baud rates and high throughput up to 4 Mbps. The default baud rate after
reset is 115 200 baud and 3 000 000 baud after firmware is loaded.
The UART interface operation includes:
• Bluetooth firmware upload to the module
• Bluetooth data
Name
I/O
Description
Remarks
BT_UART_TX
O
UART TX signal
Connect to Host RX
BT_UART_RX
I
UART RX signal
Connect to Host TX
BT_UART_RTS
O
UART RTS signal
Connect to Host CTS
BT_UART_CTS
I
UART CTS signal
Connect to Host RTS
Table 11: UART signal description
High-Speed UART signals are powered by the VIO voltage domain.
1.5.4 PCM/I2S - Audio interface
JODY-W3 series modules support a bi-directional 4-wire PCM digital audio interface for digital audio
communication with external digital audio devices like an audio codec.
Commented [MZ26]: Update baud rate when OTP is
programmed
Commented [MZ27]: Change to 3 000 000 for ES
Commented [CT28R27]: REMINDER only, i.e.
ROLLOVER to later release