User's Manual

LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information System description
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Wireless baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions, 2G & 3G upper layer software
DSP core for 2G Layer 1 and audio processing
3G coprocessor and HW accelerator for 3G Layer 1 control software and routines
Dedicated HW for peripherals control, as UART, USB, SPI etc
Memory system in a Multi-Chip Package (MCP) integrating two devices:
NOR flash non-volatile memory
DDR SRAM volatile memory
Power Management Unit (PMU), used to derive all the system supply voltages from the module supply VCC
32.768 kHz crystal, connected to the Real Time Clock (RTC) oscillator to provide the clock reference in idle or
power off mode
1.2.2 Hardware differences between LISA-U1/LISA-H1 series modules
Hardware differences between the LISA-U1/LISA-H1 series modules:
3G Dual-band support:
Band II (1900 MHz) and Band V (850 MHz) are supported by LISA-U100, LISA-U120, LISA-H100
Band I (2100 MHz) and Band VIII (900 MHz) are supported by LISA-U110, LISA-U130, LISA-H110
3G maximum data rate capabilities:
HSUPA category 6, up to 7.2 Mb/s DL, 5.76 Mb/s UL for LISA-U1 series
HSDPA category 8, up to 7.2 Mb/s DL, 384 kb/s UL for LISA-U1 series
HSDPA category 6, up to 3.6 Mb/s DL, 384 kb/s UL for LISA-H1 series
Audio support:
One differential analog audio input, one differential analog audio output and one 4-wire digital audio
interface are supported by LISA-U120 and LISA-U130
No analog audio input, no analog audio output and no digital audio interface are supported by
LISA-U100, LISA-U110, LISA-H100, LISA-H110