User's Manual

LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information System description
Page 12 of 116
Function
Pin
No
I/O
Description
Remarks
SPI_MRDY
59
I
SPI Master Ready to
transfer control line.
Master Output,
Slave Input
Module Input: module runs as an SPI slave.
Internal active pull- down to GND enabled.
See section 1.9.4
DDC
SCL
45
O
I
2
C bus clock line
Fixed open drain. External pull-up required.
See section 1.10
SDA
46
I/O
I
2
C bus data line
Fixed open drain. External pull-up required.
See section 1.10
UART
RxD
16
O
UART received data
Circuit 104 (RxD) in ITU-T V.24.
Provide access to the pin for FW update and
debugging if the USB interface is connected to the
application processor.
See section 1.9.2
TxD
15
I
UART transmitted data
Circuit 103 (TxD) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
Provide access to the pin for FW update and
debugging if the USB interface is connected to the
application processor.
See section 1.9.2
CTS
14
O
UART clear to send
Circuit 106 (CTS) in ITU-T V.24.
Provide access to the pin for debugging if the USB
interface is connected to the application processor.
See section 1.9.2
RTS
13
I
UART ready to send
Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
Provide access to the pin for debugging if the USB
interface is connected to the application processor.
See section 1.9.2
DSR
9
O
UART data set ready
Circuit 107 (DSR) in ITU-T V.24.
See section 1.9.2
RI
10
O
UART ring indicator
Circuit 125 (RI) in ITU-T V.24.
See section 1.9.2
DTR
12
I
UART data terminal
ready
Circuit 108/2 (DTR) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
See section 1.9.2
DCD
11
O
UART data carrier detect
Circuit 109 (DCD) in ITU-T V.24.
See section 1.9.2
GPIO
GPIO1
20
I/O
GPIO
See section 1.12
GPIO2
21
I/O
GPIO
See section 1.12
GPIO3
23
I/O
GPIO
See section 1.12
GPIO4
24
I/O
GPIO
See section 1.12
GPIO5
51
I/O
GPIO
See section 1.12
USB
VUSB_DET
18
I
USB detect input
Input for VBUS (5 V typical) USB supply sense to
enable USB interface.
Provide access to the pin for FW update and
debugging if the USB interface is not connected to
the application processor.
See section 1.9.3
USB_D+
26
I/O
USB Data Line D+
90 Ω nominal differential impedance
Pull-up or pull-down resistors and external series
resistors as required by the USB 2.0 high-speed
specification [7] are part of the USB pad driver and
need not be provided externally.
Provide access to the pin for FW update and
debugging if the USB interface is not connected to
the application processor.
See section 1.9.3