User's Manual

LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information System description
Page 36 of 116
1.6.3 Module reset
The module reset can be performed in one of 2 ways:
 Forcing a low level on the RESET_N pin, causing an “external” or “hardware” reset
 Via AT command, causing an “internal” or “software” reset
LISA-U1/LISA-H1 series modules can be reset using the RESET_N pin: when the RESET_N pin is forced low for at
least 50 ms, an “external” or “hardware” reset is performed. This causes an asynchronous reset of the entire
module, including the integrated Power Management Unit, except for the RTC internal block: the V_INT
interfaces supply is switched off and all the digital pins are tri-stated, but the V_BCKP supply and the RTC block
are enabled. Forcing an “external” or “hardware” reset, the current parameter settings are not saved in the
module’s non-volatile memory and a proper network detach is not performed.
LISA-U1/LISA-H1 series modules can also be reset by means of the AT+CFUN command (more details in u-blox
AT Commands Manual [2]): in this case an “internal” or “software” reset is performed, causing an asynchronous
reset of the baseband processor, excluding the integrated Power Management Unit and the RTC internal block:
the V_INT interfaces supply is enabled and each digital pin is set in its internal reset state (reported in the pin
description table in the LISA-U1/LISA-H1 series Data Sheet [1]), the V_BCKP supply and the RTC block are
enabled. Forcing an “internal” or “software” reset, the current parameter settings are saved in the module’s
non-volatile memory and a proper network detach is performed.
When RESET_N is released from the low level, the module automatically starts its power on sequence from the
reset state. The same procedure is followed for the module reset via AT command after having performed the
network detach and the parameter saving in non-volatile memory.
The internal reset state of all digital pins is reported in the pin description table in LISA-U1/LISA-H1 series
Data Sheet [1].
Name
Description
Remarks
RESET_N
External reset input
Internal 10 k pull-up to V_BCKP
Table 12: Reset pin
The RESET_N pin ESD rating is 1 kV (contact discharge). A higher protection level could be required if
the line is externally accessible on the application board. A higher protection level can be achieved
mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) on the line connected to this
pin.
For more details about the general precautions for ESD immunity about RESET_N pin please refer to
chapter 2.5.1.
The electrical characteristics of RESET_N are different from the other digital I/O interfaces. The detailed electrical
characteristics are described in the LISA-U1/LISA-H1 series Data Sheet [1].
RESET_N is pulled high by an integrated 10 k pull-up resistor to V_BCKP. Therefore an external pull-up is not
required on the application board.
Following are some typical examples of application circuits using the RESET_N input pin.
The simplest way to reset the module is to use a push button that shorts the RESET_N pin to ground.
If RESET_N is connected to an external device (e.g. an application processor on an application board) an open
drain output can be directly connected without any external pull-up. A push-pull output can be used too: in this
case make sure that the high level voltage of the push-pull circuit is below the maximum voltage value of the
V_BCKP operating range. To avoid unwanted reset of the module make sure to fix the proper level on RESET_N
in all possible scenarios.
As ESD immunity test precaution, a 47 pF bypass capacitor (e.g. Murata GRM1555C1H470JA01) and a series
ferrite bead (e.g. Murata BLM15HD182SN1) must be added on the RESET_N line pin to avoid a module reset
caused by an electrostatic discharge applied to the application board (for more details, refer to chapter 2.5.1).