User's Manual

LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information System description
Page 53 of 116
Providing the TxD and RxD lines only (not using the complete V24 link)
If the functionality of the CTS, RTS, DSR, DCD, RI and DTR lines is not required in the application, or the lines
are not available, the application circuit described in Figure 29 must be implemented:
 Connect the module CTS output line to the module RTS input line, since the module requires RTS active
(low electrical level) if HW flow-control is enabled (AT&K3, that is the default setting), and CTS is active (low
electrical level) when the module is in active mode, the UART interface is enabled and the HW flow-control is
enabled
 Connect the module DTR input line to GND, since the module requires DTR active (low electrical level)
 Leave DSR, DCD and RI lines of the module unconnected and floating
LISA-U1/LISA-H1 series
(DCE)
TxD
Application Processor
(DTE)
RxD
RTS
CTS
DTR
DSR
RI
DCD
GND
15
TXD
12
DTR
16
RXD
13
RTS
14
CTS
9
DSR
10
RI
11
DCD
GND
Figure 29: UART interface application circuit with partial V.24 link (3-wire) in the DTE/DCE serial communication
If only TxD and RxD lines are provided as described in Figure 29 and HW flow-control is disabled (AT&K0), the
power saving will be enabled by AT+UPSV=1. The module enters active-mode 20 ms after a low-to-high
transition on the TxD input line; the recognition of the subsequent characters is guaranteed until the module is
in active-mode.
A data delivered by the DTE can be lost using this configuration and the following settings:
o HW flow-control enabled in the module (AT&K3, that is the default setting)
o Module power saving enabled by AT+UPSV=1
o HW flow-control disabled in the DTE
In this case the first character sent when the module is in idle-mode will be a wake-up character and
won’t be a valid communication character (refer to chapter 1.9.1.3 for the complete description).
If power saving is enabled the application circuit with the TxD and RxD lines only is not recommended.
During command mode the DTE must send to the module a wake-up character or a dummy “AT”
before each command line (refer to chapter 1.9.1.3 for the complete description), but during data mode
the wake-up character or the dummy “AT” would affect the data communication.
Additional considerations
If the module USB interface of the is connected to the application processor, it is highly recommended
to provide direct access to RxD, TxD, CTS and RTS lines of the module for execution of firmware
upgrade over UART and for debug purpose: testpoints can be added on the lines to accommodate the
access and a 0 Ω series resistor must be mounted on each line to detach the module pin from any other
connected device. Otherwise, if the USB interface is not connected to the application processor, it is
highly recommended to provide direct access to VUSB_DET, USB_D+, USB_D- lines for execution of