User's Manual

LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information System description
Page 78 of 116
1.14 Schematic for LISA-U1/LISA-H1 series module integration
Figure 45 is an example of a schematic diagram where a LISA-U1/LISA-H1 series module is integrated into an
application board, using all the interfaces of the module.
47pF
SIM Card Holder
CCVCC (C1)
CCVPP (C6)
CCIO (C7)
CCCLK (C3)
CCRST (C2)
GND (C5)
47pF 47pF 100nF
50VSIM
48SIM_IO
47SIM_CLK
49SIM_RST
47pF
SW1
SW2
4V_INT
51GPIO5
470k
1k
ESD ESD ESD ESD ESD ESD
TXD
RXD
RTS
CTS
DTR
DSR
RI
DCD
GND
15 TXD
12 DTR
16 RXD
13 RTS
14 CTS
9 DSR
10 RI
11 DCD
GND
3V8
330µF
39pF
GND
10nF100nF 10pF
LISA-U1/LISA-H1 series
62 VCC
63 VCC
61 VCC
+
100µF
2 V_BCKP
MOSI
MISO
SCLK
Interrupt
GPIO
GND
56
SPI_MOSI
59
SPI_MRDY
57
SPI_MISO
55
SPI_SCLK
58
SPI_SRDY
GND
VBUS
D+
D-
GND
18
VUSB_DET
27
USB_D+
26
USB_D-
GND
100nF
5RSVD
52RSVD
74RSVD
GND
RTC
back-up
27pF 27pF 27pF
82nH
54SPK_N
53SPK_P
39
MIC_N
40MIC_P
ESD
Headset Connector
ESD
INOUT
GND
Low Noise LDO Regulator
3V8
2.2k
2.2k
10µF
2.2k
2.2k
10µF
2V5
Sense lines connected
to GND in one star point
82nH
27pF
10µF
ESD ESD
u-blox
1.8V GPS Receiver
4.7k
OUTIN
GND
LDO Regulator
SHDN
SDA
SCL
4.7k
3V8 1V8_GPS
SDA2
SCL2
GPIO3
GPIO4
TxD1
EXTINT0
46
45
23
24
4.7k
VCC
GPIO2
21
ANT
68
Antenna
1.8V DTE
1.8V SPI Master
USB 2.0 Host
1.8V Digital
Audio Device
I2S_RXD
I2S_CLK
I2S_TXD
I2S_CLK
I2S_TXD
I2S_WA
I2S_RXD
I2S_WA
44
43
42
41
LISA-U120/U130 only
20 GPIO1
3V8
Network
Indicator
22 RESET_N
Ferrite Bead
47pF
Application
Processor
Open
Drain
Output
19 PWR_ON
100kΩ
Open
Drain
Output
0Ω
0Ω
TP
TP
Figure 45: Example of schematic diagram to integrate LISA module in an application board, using all the interfaces