User's Manual
LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information Design-In
Page 82 of 116
2 Design-In
2.1 Design-in checklist
This section provides a design-in checklist.
2.1.1 Schematic checklist
The following are the most important points for a simple schematic check:
DC supply must provide a nominal voltage at VCC pin above the minimum operating range limit.
DC supply must be capable of providing 2.5 A current pulses, providing a voltage at VCC pin above the
minimum operating range limit and with a maximum 400 mV voltage drop from the nominal value.
VCC supply should be clean, with very low ripple/noise: suggested passive filtering parts can be inserted.
VCC voltage must ramp from 2.5 V to 3.2 V within 1 ms to allow a proper switch-on of the module.
Connect only one DC supply to VCC: different DC supply systems are mutually exclusive.
Do not leave PWR_ON floating: add a pull-up resistor to V_BCKP.
Don’t apply loads which might exceed the limit for maximum available current from V_INT supply.
Check that voltage level of any connected pin does not exceed the relative operating range.
Capacitance and series resistance must be limited on each SIM signal to match the SIM specifications.
Insert the suggested low capacitance ESD protection and passive filtering parts on each SIM signal.
Check UART signals direction, since the signal names follow the ITU-T V.24 Recommendation [3].
Provide appropriate access to USB interface and/or to UART RxD, TxD lines and access to PWR_ON
and/or RESET_N lines on the application board in order to flash/upgrade the module firmware.
Provide appropriate access to USB interface and/or to UART RxD, TxD, CTS, RTS lines for debugging.
Add a proper pull-up resistor to a proper supply on each DDC (I
2
C) interface line, if the interface is used.
Capacitance and series resistance must be limited on each line of the DDC interface.
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 kΩ resistor on
the board in series to the GPIO when those are used to drive LEDs.
Connect the pin number 5 (RSVD) to ground.
Insert the suggested passive filtering parts on each used analog audio line.
Check the digital audio interface specifications to connect a proper device.
Provide proper precautions for ESD immunity as required on the application board.
All unused pins can be left floating on the application board except the PWR_ON pin (must be
connected to V_BCKP by a pull-up resistor) and the RSVD pin number 5 (must be connected to GND).
2.1.2 Layout checklist
The following are the most important points for a simple layout check:
Check 50 nominal characteristic impedance of the RF transmission line connected to ANT pad.
Follow the recommendations of the antenna producer for correct antenna installation and deployment
(PCB layout and matching circuitry).
Ensure no coupling occurs with other noisy or sensitive signals (primarily MIC signals, audio output
signals, SIM signals).
VCC line should be wide and short.
Route VCC supply line away from sensitive analog signals.