User's Manual
LISA-U1/LISA-H1 series - System Integration Manual
3G.G2-HW-10002-2 Advance Information Design-In
Page 85 of 116
Rank
Function
Pin(s)
Layout
Remarks
1
st
RF Antenna In/out
Very Important
Design for 50 characteristic impedance.
See section 2.2.1.1
2
nd
Main DC Supply
Very Important
VCC line should be wide and short. Route away
from sensitive analog signals.
See section 2.2.1.2
3
rd
USB Signals
Very Important
Route USB_D+ and USB_D- as differential lines:
design for 90 differential impedance.
See section 2.2.1.3
4
th
Analog Audio
Careful Layout
Avoid coupling with noisy signals.
See section 2.2.1.4
Audio Inputs
MIC_P, MIC_N
Audio Outputs
SPK_P, SPK_N
5
th
Ground
GND
Careful Layout
Provide proper grounding.
See section 2.2.1.5
6
th
Sensitive Pin :
Careful Layout
Avoid coupling with noisy signals.
See section 2.2.1.6
Backup Voltage
V_BCKP
Power On
PWR_ON
7
th
High-speed digital pins:
Careful Layout
Avoid coupling with sensitive signals.
See section 2.2.1.7
SPI Signals
SPI_SCLK, SPI_MISO,
SPI_MOSI, SPI_SRDY,
SPI_MRDY
8
th
Digital pins and
supplies:
Common
Practice
Follow common practice rules for digital pin
routing.
See section 2.2.1.8
SIM Card Interface
VSIM, SIM_CLK,
SIM_IO, SIM_RST
Digital Audio
(If implemented)
I2S_CLK, I2S_RXD,
I2S_TXD, I2S_WA
DDC
SCL, SDA
UART
TXD, RXD, CTS, RTS,
DSR, RI, DCD, DTR
External Reset
RESET_N
General Purpose I/O
GPIO1, GPIO2, GPIO3,
GPIO4, GPIO5
USB detection
VUSB_DET
Supply for Interfaces
V_INT
Table 34: Pin list in order of decreasing importance for layout design
2.2.1.1 RF antenna connection
The RF antenna connection pin ANT is very critical in layout design. The PCB line must be designed to provide
50 nominal characteristic impedance and minimum loss up to radiating element.
Provide proper transition between the ANT pad to application board PCB
Increase GND keep-out (i.e. clearance) for ANT pad to at least 250 µm up to adjacent pads metal definition
and up to 500 µm on the area below the Data Module, as described in Figure 47.
Add GND keep-out (i.e. clearance) on buried metal layers below ANT pad and below any other pad of
component present on the RF line, if top-layer to buried layer dielectric thickness is below 200 µm, to reduce
parasitic capacitance to ground (see Figure 47 for the description keep-out area below ANT pad)
The transmission line up to antenna connector or pad may be a micro strip or a stripline. In any case must be
designed to achieve 50 Ω characteristic impedance
Microstrip lines are usually easier to implement and the reduced number of layer transitions up to antenna
connector simplifies the design and diminishes reflection losses. However, the electromagnetic field extends
to the free air interface above the stripline and may interact with other circuitry
USB_D-
USB_D+
VCC
ANT