Integration Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Power management
- 1.6 System functions
- 1.7 RF connection
- 1.8 (U)SIM interface
- 1.9 Serial communication
- 1.10 DDC (I2C) interface
- 1.11 Audio Interface
- 1.12 General Purpose Input/Output (GPIO)
- 1.13 Reserved pins (RSVD)
- 1.14 Schematic for LISA-U series module integration
- 1.15 Approvals
- 2 Design-In
- 2.1 Design-in checklist
- 2.2 Design Guidelines for Layout
- 2.2.1 Layout guidelines per pin function
- 2.2.2 Footprint and paste mask
- 2.2.3 Placement
- 2.3 Thermal aspects
- 2.4 Antenna guidelines
- 2.5 ESD precautions
- 3 Features description
- 4 Handling and soldering
- 5 Product Testing
- Appendix
- A Migration to LISA-U2 series wireless modules
- B Glossary
- Related documents
- Revision history
- Contact
LISA-U series - System Integration Manual
3G.G2-HW-10002-A3 Preliminary System description
Page 11 of 160
A separated shielding box contains all the other analog RF components, including:
Main Antenna Switch
Duplexer SAW filter bank
Antenna Switch for diversity receiver
SAW filter bank for diversity receiver
Six-band HSPA/WCDMA and quad-band EDGE/GPRS/GSM transceiver
Power Management Unit with integrated DC/DC converter for the Power Amplifier Module
Voltage Controlled Temperature Compensated 26 MHz Crystal Oscillator (VC-TCXO)
While operating in 3G mode, the RF transceiver performs direct up-conversion and down-conversion of the
baseband I/Q signals, with the RF voltage controlled gain amplifier being used to set the uplink TX power. In the
downlink path, the integrated LNA enhances the RX sensitivity while discrete inter-stage SAW filters additionally
improve the rejection of out-of-band blockers. An internal programmable gain amplifier optimizes the signal
levels before delivering to the analog I/Q to baseband for further digital processing.
For 2G operations, a constant gain direct conversion receiver with integrated LNAs and highly linear RF
quadrature demodulator are used to provide the same I/Q signals to the baseband as well. In transmission mode,
the up-conversion is implemented by means of a digital sigma-delta transmitter or polar modulator depending
on the modulation to be transmitted.
The RF antenna pad for the diversity receiver (ANT_DIV) available on LISA-U230 modules is directly connected to
the antenna switch for the diversity receiver, which dispatches the incoming RF signals to the dedicated SAW
filter bank for out-of-band rejection and then to the diversity receiver port of the RF transceiver.
In all the modes, a fractional-N sigma-delta RF synthesizer and an on-chip 3.296-4.340 GHz voltage controlled
oscillator are used to generate the local oscillator signal.
The frequency reference to RF oscillators is provided by the 26 MHz VC-TCXO. The same signal is buffered to the
baseband as a master reference for clock generation circuits while operating in active mode.
LISA-U series modulation techniques
Modulation techniques related to radio technologies supported by LISA-U series modules, are listed as follows:
GSM GSMK
GPRS GMSK
EDGE GMSK / 8-PSK
WCDMA QPSK
HSDPA QPSK / 16-QAM
HSUPA QPSK / 16-QAM
LISA-U series Baseband and Power Management Unit section
Another shielding box of LISA-U series modules includes all the digital circuitry and the power supplies, basically
the following functional blocks:
Wireless baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions, 2G & 3G upper layer software
DSP core for 2G Layer 1 and audio processing
3G coprocessor and HW accelerator for 3G Layer 1 control software and routines
Dedicated HW for interfaces management
Memory system in a Multi-Chip Package (MCP) integrating two devices:
NOR flash non-volatile memory
DDR SRAM volatile memory
Power Management Unit (PMU), used to derive all the system supply voltages from the module supply VCC