User's Manual

3300-Watt VHF Low Band Transmitter Chapter 4, Circuit Descriptions
335B, Rev. 0 4-6
The Mixer Z2 heterodynes the aural-
modulated, 4.5-MHz signal with the
45.75-MHz CW signal to produce the
modulated 41.25-MHz aural IF signal
output.
The output of the mixer at pin 4, the R
output, is fed to a bandpass filter that is
tuned to pass only the modulated 41.25-
MHz aural IF signal. The bandpass
filtered signal is fed to jack J16, the
41.25-MHz aural IF loop-through output
jack of the board. For normal operation,
the 41.25-MHz signal is jumpered by a
coaxial cable W11 from J16 to J17 on the
board. If the (Optional) aural IF loop-
through kit is purchased, the Aural IF
41.25-MHz signal is connected to the rear
of the tray, to which any Aural IF
processing trays can be connected, and
then back to jack J17 on the board.
The modulated 41.25-MHz aural IF signal
from J17 is connected through an
impedance matching transformer T3,
75O to 50O, to the amplifier ICs U15 and
U16. The amplified output is connected
to the attenuator matching circuit that is
adjusted by R85. R85 increases or
decreases the level of the Aural IF 41.25
MHz that sets the A/V ratio in the
diplexer circuit.
4.1.2.6 Diplexer Circuit
The diplexer circuit takes the modulated
45.75-MHz visual IF, that connects to the
junction of R76 and L12, and the
modulated 41.25-MHz aural IF, that
connects to the junction of R76 and L13,
and combines them to produce the
45.75-MHz + 41.25-MHz IF output. The
combined 45.75-MHz + 41.25-MHz IF
signal is amplified by U12 and connected
to J20 the combined IF output jack of the
board. A sample of the combined IF
output is provided at J21.
If an (Optional) NICAM input is used, it
connects to J36 on the board. The level
of the NICAM signal is set by R109 before
it is fed to the diplexer circuit consisting
of L28, L29, and R115. This circuit
combines the NICAM signal with the
45.75-MHz visual IF + 41.25-MHz aural
IF signal.
4.1.2.7 Operational Voltages
The +12 VDC needed to operate the sync
tip clamp modulator board enters the
board at J23 pin 3, and is filtered by L26,
L33, and C73 before it is connected to
the rest of the board.
The -12 VDC needed to operate the
board enters the board at J23 pin 5, and
is filtered by L27 and C74 before being
fed to the rest of the board.
4.1.3(Optional) (A6) Delay Equalizer
Board (1227-1204; Appendix D)
The (Optional) delay equalizer board
provides a delay to the video signal,
correction to the frequency response, and
amplification of the video signal.
The video signal enters the board at J1-2
and is connected to a pi-type, low-pass
filter consisting of C16, L7, and C17.
This filter eliminates any unwanted
higher frequencies from entering the
board. The output of the filter is
connected to the amplifier stage U1,
whose gain is controlled by R29. The
video output of the amplifier stage is
wired to the first of four delay-equalizing
circuits that shape the video signal to the
FCC specification for delay equalization or
to the desired shape needed for the
system. The board has been factory-
adjusted to the FCC specification and
should not be readjusted without the
proper equipment.
Resistors R7, R12, R17, and R22 adjust
the sharpness of the response curve,
while inductors L1, L2, L3, and L4 adjust
the position of the curve. With a delay
equalizer test generator signal or a sine
x/x video test pattern input, the resistors
and inductors can be adjusted, while
monitoring a Tektronix VM700 test
measurement set, until the desired FCC
delay equalization curve or system curve