User's Manual

3300-Watt VHF Low Band Transmitter Chapter 4, Circuit Descriptions
335B, Rev. 0 4-10
4.1.5.5 Main IF Signal Path (Part 1 of 3)
The selected visual + aural IF input (0
dBm) signal is split at L1 and L2, with
one half of the signal flowing through L1
and entering a bandpass filter that
consists of L3, L4, C4, L5, and L6. This
bandpass filter can be tuned with C4 and
is substantially broader than the IF signal
bandwidth. It is used to slightly steer the
frequency response of the IF to make up
for any small discrepancies in the
frequency response in the stages that
precede this point. The filter also serves
the additional function of rejecting
unwanted frequencies that may occur if
the tray cover is off and the tray is in a
high RF environment. If this is the case,
the transmitter will have to be serviced
with the tray cover off in spite of the
presence of other RF signals. The filtered
IF signal is fed through a pi-type
matching pad consisting of R2, R3, and
R4 to the pin-diode attenuator circuit
consisting of CR1, CR2, and CR3.
4.1.5.6 Input Level Detector Circuit
The other part of the split IF input is
connected through L2 and C44 to U7, an
IC amplifier that is the first stage of the
input level detector circuit. The amplified
IF is fed to T4 that is a step-up
transformer, which feeds a diode
detector CR14. The positive-going
detected signal is then low-pass filtered
by C49, L18, and C50. This allows only
the video with positive sync to be applied
through the emitter follower Q1. The
signal is then connected to the detector
CR15 that produces a peak of sync
voltage, which is applied to the op-amp
U9A. There is a test point at TP3 that
provides a voltage reference check of the
input level. The detector serves the dual
function of providing a reference that
determines the input IF signal level to
the board and also serves as an input
threshold detector. The input threshold
detector prevents the automatic level
control from reducing the attenuation of
the pin-diode attenuator to minimum
(the maximum signal) if the IF input to
the board is removed. Without the
threshold detector, and with the pin-
diode attenuator at minimum, when the
signal is restored it will overdrive the
stages following this board. The ALC,
video loss cutback, and the threshold
detector circuits will only operate when
jumper W3 on jack J6 is in the Auto
position, between pins 1 and 2.
As part of the threshold detector
operation, the minimum IF input level, as
measured at TP3, is fed through the
detector diode CR15 to the op-amp IC
U9A pin 2. The reference voltage for the
op-amp is determined by the voltage
divider that consists of R50 and R51, off
the +12 VDC line. When the detected
input signal level at U9A pin 2, falls
below this reference threshold,
approximately 10 dB below the normal
input level, the output of U9A at pin 1
goes to the +12 VDC rail. This high is
connected to the base of Q2. At this
point, Q2 is forward biased and creates a
current path from the -12 VDC line
through the red LED DS1, the input level
fault indicator, which lights, the resistor
R54, and the transistor Q2 to the +12
VDC line.
The high from U9A also connects through
the diode CR16 to U9B pin 5, whose
output at pin 7 goes high. The high
connects through the range adjust pot
R74 to J20, which connects to the front
panel mounted power adjust pot. This
high also connects to U10A pin 2, and
causes it to go low at U10A pin 1. The
low is applied through the jumper W3 on
J6, when in auto, to the pin-diode
attenuator circuit, CR1 – CR3, that cuts
back the IF level and, therefore also the
output power level, to 0. When the input
signal level increases above the threshold
level, the output power will increase, as
the input level increases, until normal
output power is reached.
The video input level as measured at TP3
is also fed to a sync-separator circuit,
consisting of U8, CR17, Q3, and
associated components, and then to a