Assembly Instructions Chapter 4

10-kW UHF Transmitter with Chapter 4, Circuit
Feedforward Drive Descriptions
840A, Rev. 0 4-12
the ALC detector is offset, or
complemented, by current taken away
from the summing junction. In normal
operation, U10A, pin 2, is at 0 VDC when
the loop is satisfied. If the recovered or
peak-detected IF signal at IF input jack
J7 of this board should drop in level,
which normally means that the output
power is decreasing, the null condition
would no longer occur at U10A, pin 2.
When the level drops, the output of
U10A, pin 1, will go more positive. If
jumper W3 on J6 is in the Automatic
position, it will cause the ALC pin-diode
attenuators CR1, CR2, and CR3 to have
less attenuation and increase the IF
level; this will act to compensate for the
decrease in level. If the ALC cannot
increase the input level enough to satisfy
the ALC loop, due to there not being
enough range, an ALC fault will occur.
The fault is generated because U10D, pin
12, increases above the trip point set by
R84 and R83 until it conducts. This
makes U10D, pin 14, high and causes the
red ALC Fault LED DS2 to light.
Scrambled Operation with Encoding
For encoded, scrambled operation,
jumper W4 on J8 must be connected
between pins 2 and 3, jumper W8 on J9
must be between pins 3 and 2, jumper
W7 on J26 must be between pins 2 and
3, and jumper W5 on J21 must be
between pins 2 and 3. The IF is
connected through W4 on J8 to the sync
regeneration circuits.
If this board is operated with scrambling,
using suppressed sync, the ALC circuit
operates differently than described above
because there is no peak of sync present
on the IF input. A timing pulse from the
scrambling encoder connects to the
board at J24. This timing pulse is
converted to sync pulses by U17A and
U17B, which control the operation of Q8.
The sync amplitude is controlled by R149
and is then applied to U15A, where it is
added to the detected IF signal to
produce a peak of sync level. The output
of U15A is peak detected by CR26 and
fed to U15B. If necessary, intercarrier
notch L39 can be placed in the circuit by
placing W6 on J22. The intercarrier notch
is adjusted to filter any aural and 4.5-
MHz intercarrier frequencies. The peak of
sync signal is fed through R162, the ALC
calibration control, to amplifier U15C. The
amplified peak of sync output is
connected through J21, pins 2 and 3, to
U10A, where it is used as the reference
for the ALC circuit and the AGC reference
to the transmitter control board. Voltage
TP4 should be the same in either the
normal or the encoded video mode.
Monitor J9, pins 3 and 4, with a spectrum
analyzer, check that the board is in the
AGC mode, and tune C103 to notch-out
the aural IF carrier.
Fault Command
The ALC board also has circuitry for an
external mute fault input at J19, pin 6.
This is a Mute command and, in most
systems, it is involved in the protection
of the circuits of high-gain output
amplifier devices. The Mute command is
intended to protect the amplifier devices
against VSWR faults. In this case, the
action should occur faster than just
pulling the ALC reference down. Two
different mechanisms are employed: one
is a very fast-acting circuit to increase
the attenuation of the pin-diode
attenuator, CR3, CR1, and CR2, and the
second is the reference voltage being
pulled away from the ALC amplifier
device. An external Mute is a pull-down
applied to J19, pin 6, to provide a current
path from the +12 VDC line through R78
and R139, the LED DS4 (Mute indicator),
and the LED section of opto-isolator U11.
These actions turn on the transistor
section of U11 that applies -12 VDC
through CR21 to U10A, pin 3, and pulls
down the reference voltage. This is a
fairly slow action that is kept at this pace
by the low-pass filter function of R81 and
C61. When the transistor section of U11
is on, -12 VDC is also connected through
CR22 to the pin-diode attenuator circuit.
This establishes a very fast muting