Assembly Instructions Chapter 4

10-kW UHF Transmitter with Chapter 4, Circuit
Feedforward Drive Descriptions
840A, Rev. 0 4-16
The RF input signal from the external
filter re-enters the board at J4 (-11 to -
14 dBm) and is capacitively coupled to
the pin-diode attenuator circuit that
consists of CR1, CR2, and CR5. The pin-
diode attenuator acts as a voltage-
variable attenuator in which each pin
diode functions as a voltage-variable
resistor and depends on the DC bias
supplied to the diode for the resistance
value. The pin diodes, because of a large,
intrinsic region, cannot rectify signals at
this RF frequency; they act as a linear
voltage-variable resistor. The pin diodes
are configured in a shunt configuration
where CR1 is the first shunt element,
CR2 is the second shunt element, and
CR5 is the series element. In most cases,
the manual gain AGC, W1 on J10
between pins 1 and 2, is used. The
control voltage from manual gain pot R10
sets up a current path through R11 and
the diodes in the pin attenuator.
The level-controlled RF signal from the
pin-diode attenuator circuit is amplified
by wideband-hybrid amplifier IC U2; U2
is configured in the same way as U1. The
RF signal is buffered by Q1 and applied to
the push-pull class A amplifier circuit that
consists of Q2 and Q3. At the input to the
transistors, the RF is converted to a
balanced dual feed by a balun L4 made
from a short length of UT-141 coaxial
cable. Capacitors C12 and C13 provide
DC blocking for the input signal to the
amplifier devices. The RF outputs at the
collectors of the transistors are applied
through C19 and C20, which provide DC
blocking for the output signals. The RF
signals connect to L7, which consists of
UT-141 coaxial cable, that combines the
RF back to a single RF output at a 50Ω
impedance to L8; L8 provides a sample
of the RF.
The main path through L10 is to J5, the
RF output jack of the board (+10 to +20
dBm). The sample of the RF connects to
a splitter that provides a sample output
(0 dBm) at J6 of the board. The other
output of the splitter connects to a peak-
detector circuit, consisting of CR3 and
U3, that provides a DC level at J7
representing the RF output of the UHF
exciter to the front panel meter. R29 sets
up the calibration of the front panel
meter for 100% in the UHF exciter
position when the output power of the
exciter is at +17 dBm peak visual.
The upconverter board is powered by
±12 VDC that is produced by an external
power supply. +12 VDC enters through
J8, pin 3, and is filtered and isolated by
RF choke L9 and shunt capacitors C24
and C33. This circuit isolates the RF
signals of the board from those of other
devices connected to the same +12 VDC
line external to the upconverter board.
The +12 VDC is then applied to the rest
of the board.
4.1.1.8 (A15) x8 Multiplier Board (1227-
1002; Appendix B)
The x8 multiplier board multiplies the
frequency of an RF input signal by a
factor of eight. The board is made up of
three identical x2 broadband frequency
doublers.
The input signal (+5 dBm) at the
fundamental frequency enters through
SMA jack J1 and is fed through a 3-dB
matching pad, consisting of R1, R2, and
R3, to amplifier IC U1. The output of the
amplifier stage is directed through a
bandpass filter, consisting of L2 and C4,
which is tuned to the fundamental
frequency (87 to 114 MHz). The voltage
measured at TP1 is typically +.6 VDC.
The first doubler stage consists of Z1
with bandpass filter L3 and C6 tuned to
the second harmonic (174 to 228 MHz).
The harmonic is amplified by U2 and
again bandpass filtered at the second
harmonic frequency by C10 and L5 (174
to 228 MHz). The voltage measured at
TP2 is typically +1.2 VDC.
The next doubler stage consists of Z2
with bandpass filter C12 and L6 tuned to
the fourth harmonic of the fundamental
frequency (348 to 456 MHz). The fourth