Assembly Instructions Chapter 4

10-kW UHF Transmitter with Chapter 4, Circuit
Feedforward Drive Descriptions
840A, Rev. 0 4-22
connects to J6, pins 2 and 3, which
supply the peak of sync visual level
output to the front panel meter for
monitoring.
If this board is operated with scrambling,
using suppressed sync, the visual level
circuit operates differently than described
above because there is no peak of sync
present on the forward sample input. For
the board to operate properly, a timing
pulse from the scrambling encoder must
connect to the board at J4. This timing
pulse is converted to sync pulses by U4A
and U4B, which control the operation of
Q2. Intercarrier notch L2 is tuned to
remove any visual + aural signal that
may remain.
The sync amplitude is controlled by gate
amplitude adjust R25 and then applied to
the minus input of U1C. At this point, it is
inserted into the visual + aural signal
that is connected to the plus input of
U1C, producing a peak of sync in the
signal. The output of U1C is connected to
intercarrier notch L3, which is adjusted to
filter out the aural and the 4.5-MHz
intercarrier frequencies. The visual-with-
sync output is fed to a peak-detector
circuit, consisting of CR5 and U2A, and
then fed through visual calibration control
R28 to amplifier U2B. The amplified
visual peak of sync output is connected
to J6, pins 2 and 3, that supply the peak
of sync visual level output to the front
panel meter for monitoring. R32 moves
the pulse to where the sync should be
and R25 sets the visual metering
calibration with no sync present.
Voltages for Circuit Operation
The ±12 VDC is applied to the board at
J5. The +12 VDC is connected to J5, pin
3, and is isolated and filtered by L4 and
C34 before it is connected to the rest of
the board. The +12 VDC also connects to
U5, a 5-VDC regulator that provides the
voltage needed to operate U4. The -12
VDC is applied to J5, pin 1, and is
isolated and filtered by L5 and C35
before it is connected to the rest of the
board.
4.1.1.11 (A4-A14) Channel Oscillator
Assembly, Dual Oven (1145-1202;
Appendix B)
The channel oscillator assembly contains
the channel oscillator board (1145-1201)
that generates a stable frequency-
reference signal of approximately 100
MHz. The channel oscillator assembly is
an enclosure that provides temperature
stability for the crystal oscillator. An SMA
output at jack J1 and an RF sample at
BNC connector jack J2 are also part of
the assembly.
Adjustments can be made through access
holes in the top cover of the assembly.
These adjustments are set at the factory
and should not be tampered with unless
it is absolutely necessary and the proper,
calibrated equipment is available. R1 is
the temperature adjustment; C11 is the
course-frequency adjustment; and C6,
C18, L2, and L4 are adjusted for the
maximum output of the frequency as
measured at jack J1. C9 is the fine-
frequency adjustment.
The +12 VDC for the assembly enters
through FL1 and the circuit-ground
connection is made at E1.
4.1.2 (A1-A9) 3-Watt UHF Amplifier
Tray (1068203; Appendix A)
The modulated RF carrier signal (+8
dBm) from the 3-watt UHF amplifier
enters through J1 and is filtered by (A1)
a bandpass filter (1007-1101). The signal
(+7 dBm) is then fed to (A2) the AGC
board (1007-1201). The AGC board
controls the overall gain of the amplifier
tray by comparing a sample of the output
signal from the dual peak detector board
through the AGC control board. An AGC
reference voltage is generated either
externally or internally depending on the
system operation and the position of the
jumper on J7. The jumper should be