User's Manual

300-Watt Digital UHF Transmitter Chapter 4, Circuit Descriptions
DT830A, Rev. 1 4-1
Chapter 4
Circuit Descriptions
4.1 (A4) UHF Exciter Tray (1294-
1111; Appendix C)
4.1.1 (A12 and A18) UHF Filter
(1007-1101; Appendix D)
The UHF filter is a tunable two-section
cavity filter that is typically tuned for a
bandwidth of 5 MHz and has a loss of -1
dB through the filter.
4.1.2 (A15-A1) UHF Generator
Board (1565-1109; Appendix D)
The UHF generator board is mounted in
the UHF Generator Enclosure (1519-
1144) for EMI and RFI protection. The
board contains a VCXO circuit and
additional circuitry to multiply the VCXO
frequency by eight. The VCXO produces
an output of ≈ 67 MHz to 132 MHz,
depending on the desired channel
frequency. Course adjustment to the
frequency is made by C11, while fine
adjustments are accomplished by the AFC
voltage from (A11) the PLL board (1286-
1104). The VCXO frequency level is
adjusted by C6, L2, and L4. The output is
split and provides an input to the x8
multiplier circuitry as well as a sample for
the PLL board.
The x8 circuitry consists of three identical
x2 broadband frequency doublers. The
input signal at the fundamental frequency
is fed through a 6-dB pad consisting of
R21, R24, and R25 to amplifier U3. The
output of the amplifier stage is directed
through a bandpass filter consisting of L8
and C32, which is tuned to the
fundamental frequency (67 MHz to 132
MHz). The voltage measured at TP1 is
typically +.6 VDC. The first doubler stage
consists of Z1 with bandpass filter L9 and
C34 tuned to the second harmonic (134
MHz to 264 MHz). The harmonic is
amplified by U4 and again bandpass
filtered at the second harmonic by C38
and L11 (134 MHz to 264 MHz). The
voltage measured at TP2 is typically +1.2
VDC. The next doubler stage consists of
Z2 with bandpass filter C40 and L12
tuned to the fourth harmonic of the
fundamental frequency (268 MHz to 528
MHz). The fourth harmonic is then
amplified by U5 and fed through another
bandpass filter tuned to the fourth
harmonic consisting of L14 and C44 (268
MHz to 528 MHz). The voltage measured
at TP3 is typically +2.0 VDC. The final
doubler stage consists of Z3 with
bandpass filter C46 and L15 tuned to the
eighth harmonic of the fundamental
frequency (536 MHz to 1056 MHz). The
signal is amplified by U6 and U7 to a
typical value of from +2 to +4 VDC as
measured at TP4. The amplified eighth
harmonic is then fed to the SMA output
jack of the board at J3.
Typical output level of the signal is +16
dBm nominal.
The +12 VDC for the board enters
through jack J4-3 and is filtered by L22
and C54-C58 before being distributed to
the circuits on the board.
4.1.3 (A14-A1) 10-MHz Reference
Generator Board (1519-1126;
Appendix D)
The 10-MHz reference generator board is
located in (A10) the 10-MHz reference kit
(1286-1108). The board contains a high-
stability crystal oscillator that provides a
10-MHz output that is used as reference
frequency for the transmitter. The board
is mounted within an enclosed assembly
that helps to maintain the operating
temperature of the oscillator board.
The oscillator operates at 10 MHz.
Transistor Q1 is the oscillating transistor
with the frequency of oscillation set by
the crystal Y1. L2, C2, and C3 have
second-order effects on the frequency,
with C2 and C3 used to pull the oscillator