User's Manual

300-Watt Digital UHF Transmitter Chapter 4, Circuit Descriptions
DT830A, Rev. 1 4-25
The RF input to the board is connected to
the input of the first 2-way splitter that
contains R1. R1 is a balancing resistor in
which any RF due to mismatching in the
first splitter will be dissipated. One of the
two outputs from the splitter connects to
another 2-way splitter that contains R2.
R2 is a balancing resistor in which any RF
due to mismatching in the splitter will be
dissipated. The other output of the first
splitter connects to the third 2-way
splitter that contains R3. R3 is a
balancing resistor in which any RF due to
mismatching in the splitter will be
dissipated. The two output splitters
provide four, equal RF outputs, two each,
that are connected to the inputs of the
external amplifier boards.
4.3.5 (A4-A2) Coupler Board
Assembly (1227-1316; Appendix D)
The UHF coupler assembly is mounted in
the UHF amplifier tray and provides a
forward power sample of the input drive
level to the dual stage amplifier
assembly, class AB. The drive-level
sample from J3 is cabled to the amplifier
control board where it connects to the
input of the overdrive-protection circuit.
The RF input to the UHF coupler
assembly from the dual stage amplifier
assembly, class A, connects to SMA jack
J1. The RF is connected by a stripline
track to SMA output jack J2. A hybrid-
coupler circuit picks off a forward sample
that is connected to SMA type connector
jack J3. R1 is a dissipation load for the
reject port of the coupler.
4.3.6 (A6) Dual Peak Detector
Enclosure (1227-1317; Appendix D)
The dual peak detector enclosure
provides EMI and RFI protection for the
dual peak detector board, single supply
(1227-1333), that is mounted inside of
the enclosure. The module has two
inputs: a forward power sample at SMA
jack J1 and a reflected power sample at
SMA jack J2. The module has two peak-
detected sample outputs: a forward
power sample at FL3 from J4-4 on the
board and a reflected power sample at
FL2 from J4-2 on the board. The module
also has a forward power sample output
at SMA jack J3.
The voltage, +28 VDC, needed to
operate the board connects to FL1 on the
assembly that is wired to J4-7 on the
board.
4.3.7 (A6-A1) Dual Peak Detector
Board, Single Supply (1227-1333;
Appendix D)
The function of the dual peak detector
board is to detect forward and reflected
samples of visual or aural RF signals and
generate an output voltage proportional
to the power levels of the sampled
signals for metering purposes.
There are two identical signal paths on
the board: one for forward power and
one for reflected power. A sample of
forward output power enters the board at
SMA jack J1. Resistors R1, R2, and R3
form an input impedance-matching
network of 50Ω. The forward power
signal is detected by CR1, R4, R5, R7,
R10, C1, and C2. The output is buffered
by operational amplifiers U3B and U1C
before it is connected to forward power
output jack J4-4. U3 has a very high
input impedance that makes the IC less
sensitive to changes in the video level. A
sample of the forward power is tapped
off by R6 and R8 and fed to J3, the
forward sample output jack. Diode CR2
provides temperature compensation for
diode CR1. An input signal level of
approximately +17 dBm is enough to
give a 1-VDC level at the output of U1C.
A reflected output power sample enters
the board at SMA jack J2. Resistors R18,
R19, and R20 form an input impedance
matching network of 50Ω. The reflected
power signal is then detected by CR3,
R21, R22, R24, C5, and C6 and the
output is buffered by operational
amplifiers U3A and U1B before it is
connected to reflected power output jack