User's Manual

300-Watt Digital UHF Transmitter Chapter 5, Detailed Alignment Procedures
DT830A, Rev. 1 5-14
Once the DIP switches are set, and there
is a 10-MHz reference source present at
the rear of the tray, the board will begin
the process of phase locking the VCXO.
There are three amber LEDs on the board
that indicate the progress of the PLL
circuit. These LEDs have been designated
Step 1, Step 2, and Step 3.
When the circuit begins the PLL process,
Step 1 will illuminate. As the process
continues, Step 1 extinguishes and Step
2 illuminates. Finally, Step 2 extinguishes
and Step 3 illuminates. Once Step 3
extinguishes, the front-panel PLL Locked
LED will illuminate within 30 seconds.
Note: The front panel PLL Locked
LED may flicker once or twice before
settling into lock; this is a normal
condition. The frequency of the VCXO
is 46.690560 MHz and can be
monitored at the IF sample, J8, on
the LO card.
5.3.6 (A6) VSB Vector Modulator
Board (1520-1107; Appendix D)
The vector modulator board modulates
the baseband 8-VSB signal coming from
the VSB filter board with the LO supplied
from the local oscillator card. The
baseband signal consists of an I and a Q
component. The I component enters the
board at J3 and is frequency-response
adjusted by C16. The DC offset of this
signal path is set to zero with R5 and
the gain of this path is adjusted using
R32. This signal is then mixed at Z1 with
a 46.49056-MHz local oscillator. In a
similar fashion, the Q signal comes into
the board at J11 and is frequency-
response corrected with C43, offset
adjusted with R78, and gain adjusted by
R105. The Q signal is then mixed with
the 46.69056-MHz local oscillator, which
is 90 degrees out of phase with the local
oscillator that is mixed with the I
channel. The LO signals are generated
by quadrature splitter U8.
After the baseband I and Q signals are
mixed with the LO signals, they are
combined with combiner Z2 to produce
the final IF signal centered at 44 MHz.
This signal is amplified with U2 and U3
to produce a nominal –18 dBm signal at
J1. A sample of the IF signal is also
provided at J2; a 50-Ω termination must
be present at J1 before the signal from
sample port J2 can be used. The gain of
the final output can be adjusted using
R3. The frequency response of the IF
signal can be flattened using C19, C20,
R29, and R30.
Note: The vector modulator board
contains jumper blocks and
adjustment potentiometers that
have been preset at the factory.
Because of this, no additional
alignment is required to achieve
normal operation.
In the event that the vector modulator
becomes incorrectly aligned, the
following steps can be used to align the
board:
1. Power up the modulator with the test
jumper placed in the Enable position
on the rear of the switch board.
2. Using the up-arrow button, change
the operating mode from NORMAL to
CW ZERO POWER.
3. Using the MENU button, go to the
INPUT SOURCE menu. Use the up-
arrow button to select INTERNAL
PRBS23 as the input source.
5.3.7 (A10) DC Power Supply Board
(1047033; Appendix D)
The DC power supply board generates
both the positive and negative 12 and 5
VDC and the positive 3.3 VDC at
sufficient current levels to operate the
other boards in the modulator tray.
Visual indicators, using LEDs, are
provided on the board to show the
normal operation of each voltage
regulator.