User's Manual

Digital UHF Transmitter Chapter 4, Circuit Descriptions
DT835A, Rev. 1 4-36
generic dual stage amplifier board,
Class AB (1265-1404). The board uses
two PTB20101 Ericsson transistors in
parallel-biased Class AB to amplify the
signal by approximately +9 dB. Bias
adjust R106 sets the idling current for
Q101 at 300 mA and bias adjust R206
sets the idling current for Q201 at 300
mA. Each dual amplifier device is
mounted in identical, parallel circuits.
These devices may be biased up to 600
mA depending on the linearity of the
tray.
Input Description
The input signal from J1 on the dual
stage amplifier assembly connects to
E1 on the board. The signal is split in a
2-way Wilkinson splitter, using R1,
which provides two equal inputs, one to
each identical amplifier side.
Q101 and Associated Circuitry
One of the outputs of the splitter is
applied through AC coupling and DC
blocking capacitor C101 to L101 and
associated circuitry. This forms a balun
that converts the input signal from a
50-Ω unbalanced impedance to a 12.5-
Ω balanced impedance configuration.
C103, C104, C106, and C105, which
are adjusted for peak output, are for
impedance matching to the input of the
parallel transistors that make up Q101.
The bias voltage to the bases of the
paralleled transistors in Q101 is applied
at E101. The transistors are protected
from overvoltage by Q102, Q103,
R104, R105, and R106, which can be
adjusted to set the bias, operating
currents of the transistors. The base
voltage is RF bypassed by C129, C102,
C107, C108, C109, and C110 and
applied to the bases through R102 and
R103.
The collectors are impedance matched
to 12.5Ω by C122, C123, and C119,
which are adjusted for peak output with
the best linearity and lowest current.
C125 provides AC coupling and DC
blocking for the output signal to the
combiner. L102 and associated circuitry
form a balun that transforms the signal
back to an unbalanced 50-Ω impedance
signal.
The collector voltage is applied at E101.
The collector voltage is connected
through R108 to the collectors on the
two devices that make up Q101. R106
can be adjusted to set up the operating
currents. The collector circuit is RF
bypassed by C112 to C115, C117,
C118, C121, C124, C130, and C131.
Q201 and Associated Circuitry
The other output of the splitter is
applied through AC coupling and DC
blocking capacitor C201 to L201 and
associated circuitry. This forms a balun
that converts the input signal from a
50-Ω unbalanced impedance to a 12.5-
Ω balanced impedance configuration.
C203, C204, C206, and C205, which
are adjusted for peak output, are for
impedance matching to the input of the
parallel transistors (Q201).
The bias voltage to the bases of the
paralleled transistors, Q201, is applied
at E201. The transistors are protected
from overvoltage by Q202, Q203,
R204, R205, and R206, which can be
adjusted to set the bias, operating
currents of the transistors. The base
voltage is RF bypassed by C229, C202,
C207, C208, C209, and C210 and
applied to the bases through R202 and
R203.
The collectors are impedance matched
to 12.5Ω by C222, C223, and C219,
which are adjusted for peak output with
the best linearity and lowest current.
C225 provides AC coupling and DC
blocking for the output signal to the
combiner. L202 and associated circuitry
form a balun that transforms the signal
back to an unbalanced 50-Ω impedance
signal.