Product data

LPC1769_68_67_66_65_64_63 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.5 — 24 June 2014 18 of 89
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
P2[11]/EINT1/
I2STX_CLK
52 H8 J8
[6]
I/O P2[11] — General purpose digital input/output pin.
I EINT1
— External interrupt 1 input.
I/O I2STX_CLK — Transmit Clock. It is driven by the master and
received by the slave. Corresponds to the signal SCK in the I
2
S-bus
specification. (LPC1769/68/67/66/65/63 only).
P2[12]/EINT2
/
I2STX_WS
51 K10 K10
[6]
I/O P2[12] — General purpose digital input/output pin.
I EINT2
— External interrupt 2 input.
I/O I2STX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
2
S-bus
specification. (LPC1769/68/67/66/65/63 only).
P2[13]/EINT3
/
I2STX_SDA
50 J9 J9
[6]
I/O P2[13] — General purpose digital input/output pin.
I EINT3
— External interrupt 3 input.
I/O I2STX_SDA — Transmit data. It is driven by the transmitter and
read by the receiver. Corresponds to the signal SD in the I
2
S-bus
specification. (LPC1769/68/67/66/65/63 only).
P3[0] to P3[31] I/O Port 3: Port 3 is a 32-bit I/O port with individual direction controls for
each bit. The operation of port 3 pins depends upon the pin function
selected via the pin connect block. Pins 0 through 24, and 27
through 31 of this port are not available.
P3[25]/MAT0[0]/
PWM1[2]
27 H3 D8
[1]
I/O P3[25] — General purpose digital input/output pin.
O MAT0[0] — Match output for Timer 0, channel 0.
O PWM1[2] — Pulse Width Modulator 1, output 2.
P3[26]/STCLK/
MAT0[1]/PWM1[3]
26 K1 A10
[1]
I/O P3[26] — General purpose digital input/output pin.
I STCLK — System tick timer clock input. The maximum STCLK
frequency is 1/4 of the ARM processor clock frequency CCLK.
O MAT0[1] — Match output for Timer 0, channel 1.
O PWM1[3] — Pulse Width Modulator 1, output 3.
P4[0] to P4[31] I/O Port 4: Port 4 is a 32-bit I/O port with individual direction controls for
each bit. The operation of port 4 pins depends upon the pin function
selected via the pin connect block. Pins 0 through 27, 30, and 31 of
this port are not available.
P4[28]/RX_MCLK/
MAT2[0]/TXD3
82 C7 G1
[1]
I/O P4[28] — General purpose digital input/output pin.
O RX_MCLK — I
2
S receive master clock. (LPC1769/68/67/66/65
only).
O MAT2[0] — Match output for Timer 2, channel 0.
O TXD3 — Transmitter output for UART3.
P4[29]/TX_MCLK/
MAT2[1]/RXD3
85 E6 F1
[1]
I/O P4[29] — General purpose digital input/output pin.
O TX_MCLK — I
2
S transmit master clock. (LPC1769/68/67/66/65
only).
O MAT2[1] — Match output for Timer 2, channel 1.
I RXD3 — Receiver input for UART3.
Table 5. Pin description
…continued
Symbol Pin/ball Type Description
LQFP100 TFBGA100 WLCSP100