Product data
LPC1769_68_67_66_65_64_63 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.5 — 24 June 2014 50 of 89
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
[5] The RTC typically fails when V
i(VBAT)
drops below 1.6 V.
[6] V
DD(REG)(3V3)
= 3.3 V; T
amb
=25C for all power consumption measurements.
[7] Applies to LPC1768/67/66/65/64/63.
[8] Applies to LPC1769 only.
[9] IRC running at 4 MHz; main oscillator and PLL disabled; PCLK =
CCLK
⁄
8
.
[10] BOD disabled.
[11] On pin V
DD(REG)(3V3)
. I
BAT
= 530 nA. V
DD(REG)(3V3)
= 3.0 V; V
BAT
= 3.0 V; T
amb
=25C.
[12] On pin VBAT; I
DD(REG)(3V3)
= 630 nA; V
DD(REG)(3V3)
= 3.0 V; V
BAT
= 3.0 V; T
amb
=25C.
[13] On pin VBAT; V
BAT
= 3.0 V; T
amb
=25C.
[14] All internal pull-ups disabled. All pins configured as output and driven LOW. V
DD(3V3)
= 3.3 V; T
amb
=25C.
[15] TCK/SWDCLK pin needs to be externally pulled LOW.
[16] On pin V
DDA
; V
DDA
=3.3V; T
amb
=25C. The ADC is powered if the PDN bit in the AD0CR register is set to 1 and in Power-down mode
of the PDN bit is set to 0.
[17] The ADC is powered if the PDN bit in the AD0CR register is set to 1. See LPC17xx user manual UM10360_1.
[18] The ADC is in Power-down mode if the PDN bit in the AD0CR register is set to 0. See LPC17xx user manual UM10360_1.
[19] V
i(VREFP)
= 3.3 V; T
amb
=25C.
[20] Including voltage on outputs in 3-state mode.
[21] V
DD(3V3)
supply voltages must be present.
[22] 3-state outputs go into 3-state mode in Deep power-down mode.
[23] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[24] To V
SS
.
[25] Includes external resistors of 33 1 % on D+ and D.
11.1 Power consumption
Conditions: BOD disabled.
Fig 8. Deep-sleep mode: typical regulator supply current I
DD(Reg)(3V3)
versus
temperature
002aaf568
temperature (°C)
−40 853510 60−15
250
350
300
400
I
DD(Reg)(3V3)
(μA)
200
3.6 V
3.3 V
2.4 V