Product data

LPC1769_68_67_66_65_64_63 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.5 — 24 June 2014 63 of 89
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
12.8 USB interface
Remark: The USB controller is available as a device/Host/OTG controller on parts
LPC1769/68/66/65 and as device-only controller on part LPC1764.
[1] Characterized but not implemented as production test. Guaranteed by design.
Table 17. Dynamic characteristics: USB pins (full-speed)
C
L
= 50 pF; R
pu
= 1.5 k  on D+ to V
DD(3V3)
; 3.0 V  V
DD(3V3)
 3.6 V.
Symbol Parameter Conditions Min Typ Max Unit
t
r
rise time 10 % to 90 % 8.5 - 13.8 ns
t
f
fall time 10 % to 90 % 7.7 - 13.7 ns
t
FRFM
differential rise and fall time
matching
t
r
/t
f
--109%
V
CRS
output signal crossover voltage 1.3 - 2.0 V
t
FEOPT
source SE0 interval of EOP see Figure 23 160 - 175 ns
t
FDEOP
source jitter for differential transition
to SE0 transition
see Figure 23 2-+5ns
t
JR1
receiver jitter to next transition 18.5 - +18.5 ns
t
JR2
receiver jitter for paired transitions 10 % to 90 % 9-+9ns
t
EOPR1
EOP width at receiver must reject as
EOP; see
Figure 23
[1]
40 --ns
t
EOPR2
EOP width at receiver must accept as
EOP; see
Figure 23
[1]
82 --ns
Fig 23. Differential data-to-EOP transition skew and EOP width
002aab561
T
PERIOD
differential
data lines
crossover point
source EOP width: t
FEOPT
receiver EOP width: t
EOPR1
, t
EOPR2
crossover point
extended
differential data to
SE0/EOP skew
n × T
PERIOD
+ t
FDEOP