Product data

LPC1769_68_67_66_65_64_63 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.5 — 24 June 2014 67 of 89
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
[1] V
DDA
and VREFP should be tied to V
DD(3V3)
if the ADC and DAC are not used.
[2] The ADC is monotonic, there are no missing codes.
[3] The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See Figure 28.
[4] The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 28
.
[5] The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 28
.
[6] The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 28
.
[7] The conversion frequency corresponds to the number of samples per second.
Table 20. ADC characteristics (lower resolution)
T
amb
=  40  C to +85  C unless otherwise specified; 12-bit ADC used as 10-bit resolution ADC.
[1]
Symbol Parameter Conditions Min Typ Max Unit
E
D
differential linearity error
[2][3]
- 1- LSB
E
L(adj)
integral non-linearity
[4]
- 1.5 - LSB
E
O
offset error
[5]
- 2- LSB
E
G
gain error
[6]
- 2- LSB
f
clk(ADC)
ADC clock frequency 3.0 V  V
DDA
 3.6 V - - 33 MHz
2.7 V  V
DDA
< 3.0 V - - 25 MHz
f
c(ADC)
ADC conversion frequency 3 V  V
DDA
 3.6 V
[7]
-- 500 kHz
2.7 V  V
DDA
< 3.0 V
[7]
-- 400 kHz