Product data

LPC1769_68_67_66_65_64_63 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.5 — 24 June 2014 84 of 89
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
20. Revision history
Table 27. Revision history
Document ID Release
date
Data sheet status Change
notice
Supersedes
LPC1769_68_67_66_65_64_63 v.9.5 20140624 Product data sheet - LPC1769_68_67_66_65_64 v.9.4
Modifications:
• SSP timing diagram updated. SSP timing parameters t
v(Q)
, t
h(Q)
, t
DS
, and t
DH
added. See Section 12.7 “
SSP interface”.
• Parameter T
j(max)
added in Table 6 “Limiting values”.
• SSP maximum bit rate in master mode corrected to 33 Mbit/s.
LPC1769_68_67_66_65_64_63 v.9.4 20140404 Product data sheet - LPC1769_68_67_66_65_64 v.9.3
Modifications:
• Added LPC1768UK.
• Table 5 “Pin description”: Changed RX_MCLK and TX_MCLK type from INPUT
to OUTPUT.
LPC1769_68_67_66_65_64_63 v.9.3 20140108 Product data sheet - LPC1769_68_67_66_65_64 v.9.2
Modifications:
• Table 7 “Thermal resistance (±15 %)”:
– Added TFBGA100.
– Added 15 % to table title.
LPC1769_68_67_66_65_64_63 v.9.2 20131021 Product data sheet - LPC1769_68_67_66_65_64 v.9.1
Modifications:
• Table 8 “Static characteristics”:
– Added Table note 3 “VDDA and VREFP should be tied to VDD(3V3) if the
ADC and DAC are not used.”
– Added Table note 4 “VDDA for DAC specs are from 2.7 V to 3.6 V.”
– V
DDA
/VREFP spec changed from 2.7 V to 2.5 V.
• Table 19 “ADC characteristics (full resolution)”:
– Added Table note 1 “VDDA and VREFP should be tied to VDD(3V3) if the
ADC and DAC are not used.”
– V
DDA
changed from 2.7 V to 2.5 V.
• Table 20 “ADC characteristics (lower resolution)”: Added Table note 1 “VDDA
and VREFP should be tied to VDD(3V3) if the ADC and DAC are not used.”
LPC1769_68_67_66_65_64_63 v.9.1 20130916 Product data sheet - LPC1769_68_67_66_65_64 v.9
Modifications:
• Added Table 7 “Thermal resistance”.
• Table 6 “Limiting values”:
– Updated min/max values for V
DD(3V3)
and V
DD(REG)(3V3)
.
– Updated conditions for V
I
.
– Updated table notes.
• Table 8 “Static characteristics”: Added Table note 15 “TCK/SWDCLK pin needs
to be externally pulled LOW.”
• Updated Section 15.1 “Suggested USB interface solutions”.
• Added Section 5 “Marking”.
• Changed title of Figure 31 from “USB interface on a self-powered device” to
“USB interface with soft-connect”.