Datasheet
Table Of Contents
- 1. General Description
- 2. Electrical Characteristics
- 3. SX1272/73 Features
- 4. SX1272/73 Digital Electronics
- 4.1. The LoRaTM Modem
- 4.2. FSK/OOK Modem
- 4.2.1. Bit Rate Setting
- 4.2.2. FSK/OOK Transmission
- 4.2.3. FSK/OOK Reception
- 4.2.4. Operating Modes in FSK/OOK Mode
- 4.2.5. General Overview
- 4.2.6. Startup Times
- 4.2.7. Receiver Startup Options
- 4.2.8. Receiver Restart Methods
- 4.2.9. Top Level Sequencer
- 4.2.10. Data Processing in FSK/OOK Mode
- 4.2.11. FIFO
- 4.2.12. Digital IO Pins Mapping
- 4.2.13. Continuous Mode
- 4.2.14. Packet Mode
- 4.2.15. io-homecontrol® Compatibility Mode
- 4.3. SPI Interface
- 5. SX1272/73 Analog & RF Frontend Electronics
- 6. Description of the Registers
- 7. Application Information
- 8. Packaging Information
- 9. Revision History

www.semtech.comPage 106
SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
RegPll
(0x5C)
7-6 PllBandwidth rw 0x03
Controls the PLL bandwidth:
00 75 kHz 10 225 kHz
01
150 kHz 11 300 kHz
5-0 reserved rw 0x10 reserved. Retain default value
RegPllLowPn
(0x5E)
7-6 PllBandwidth rw 0x03
Controls the Low Phase Noise PLL bandwidth:
00 75 kHz 10 225 kHz
01
150 kHz 11 300 kHz
5-0 reserved rw 0x10 reserved. Retain default value
RegFormerTemp
(0x6C)
7-0 FormerTemp rw -
Temperature saved during the latest IQ (RSSI and Image)
calibrated. Same format as
TempValue in RegTemp.
RegBitrateFrac
(0x70)
7-4 unused r 0x00 unused
3-0 BitRateFrac rw 0x00
Fractional part of the bit rate divider (Only valid for FSK)
If
BitRateFrac> 0 then:
Name
(Address)
Bits
Variable Name
Mode
Default
value
FSK/OOK Description
BitRate
FXOSC
BitRate
15 0(,)
BitrateFrac
16
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