Datasheet
Table Of Contents
- 1. General Description
- 2. Electrical Characteristics
- 3. SX1272/73 Features
- 4. SX1272/73 Digital Electronics
- 4.1. The LoRaTM Modem
- 4.2. FSK/OOK Modem
- 4.2.1. Bit Rate Setting
- 4.2.2. FSK/OOK Transmission
- 4.2.3. FSK/OOK Reception
- 4.2.4. Operating Modes in FSK/OOK Mode
- 4.2.5. General Overview
- 4.2.6. Startup Times
- 4.2.7. Receiver Startup Options
- 4.2.8. Receiver Restart Methods
- 4.2.9. Top Level Sequencer
- 4.2.10. Data Processing in FSK/OOK Mode
- 4.2.11. FIFO
- 4.2.12. Digital IO Pins Mapping
- 4.2.13. Continuous Mode
- 4.2.14. Packet Mode
- 4.2.15. io-homecontrol® Compatibility Mode
- 4.3. SPI Interface
- 5. SX1272/73 Analog & RF Frontend Electronics
- 6. Description of the Registers
- 7. Application Information
- 8. Packaging Information
- 9. Revision History

www.semtech.comPage 112
SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
RegModemConfig
2
(0x1E)
7-4 SpreadingFactor rw 0x7
SF rate (expressed as a base-2 logarithm)
6
64 chips / symbol
7
128 chips / symbol
8
256 chips / symbol
9
512 chips / symbol
10
1024 chips / symbol
11
2048 chips / symbol
12
4096 chips / symbol
other values reserved.
3 TxContinuousMode rw 0
0
normal mode, a single packet is sent
1
continuous mode, send multiple packets across the FIFO
(used for spectral analysis)
2 AgcAutoOn rw 0x01
0
LNA gain set by register LnaGain
1
LNA gain set by the internal AGC loop
1-0 SymbTimeout(9:8) rw 0x00 RX Time-Out MSB
RegSymbTimeoutL
sb
(0x1F)
7-0 SymbTimeout(7:0) rw 0x64
RX Time-Out LSB
RX operation time-out value expressed as number of symbols:
RegPreambleMsb
(0x20)
7-0 PreambleLength(15:8) rw 0x0
Preamble length MSB, = PreambleLength + 4.25 Symbols
See Section 4.1.1.6 for more details.
RegPreambleLsb
(0x21)
7-0 PreambleLength(7:0) rw 0x8 Preamble Length LSB
RegPayloadLength
(0x22)
7-0
PayloadLength(7:0)
rw 0x1
Payload length in bytes. The register needs to be set in implicit
header mode for the expected packet length. A 0 value is not
permitted
RegMaxPayloadLe
ngth
(0x23)
7-0
PayloadMaxLength(7:0)
rw 0xFF
Maximum payload length; if header payload length exceeds
value a header CRC error is generated. Allows filtering of packet
with a bad size.
RegHopPeriod
(0x24)
7-0
FreqHoppingPeriod(7:0)
rw 0x0
Symbol periods between frequency hops. (0 = disabled). 1st hop
always happen after the 1st header symbol
RegFifoRxByteAdd
r
(0x25)
7-0 FifoRxByteAddrPtr r n/a
Current value of RX databuffer pointer (address of last byte
written by Lora receiver)
(0x26) - (0x27) - Reserved r n/a Reserved
RegFeiMsb
(0x28)
7-4 Reserved r n/a Reserved
3-0 FreqError(19:16) r 0x0
Estimated frequency error from modem in 2’s compliment format.
MSB of RF Frequency error
(RegFeiMid
(0x29)
7-0 FreqError(15:8) r 0x0 Middle byte of RF Frequency Error
Name
(Address)
Bits
Variable Name
Mode Reset
LoRa
TM
Description
TimeOut SymbTimeout Ts⋅=
F
Error
FreqError 2
24
×
F
xtal
------------------------------------------
=