Datasheet

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SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
7. Application Information
7.1. Crystal Resonator Specification
Tab le 42 shows the crystal resonator specification for the crystal reference oscillator circuit of the SX1272/73. This
specification covers the full range of operation of the SX1272/73 and is employed in the reference design.
Table 42 Crystal Specification
Notes - the initial frequency tolerance, temperature stability and aging performance should be chosen in accordance with
the target operating temperature range and the receiver bandwidth selected.
- the loading capacitance should be applied externally, and adapted to the actual Cload specification of the XTAL.
7.2. Reset of the Chip
A power-on reset of the SX1272/73 is triggered at power up. Additionally, a manual reset can be issued by controlling pin 6.
7.2.1. POR
If the application requires the disconnection of VDD from the SX1272/73, despite of the extremely low Sleep Mode current,
the user should wait for 10 ms from of the end of the POR cycle before commencing communications over the SPI bus. Pin
6 (Reset) should be left floating during the POR sequence.
Figure 46. POR Timing Diagram
Please note that any CLKOUT activity can also be used to detect that the chip is ready.
Symbol Description Conditions Min Typ Max Unit
FXOSC XTAL Frequency - 32 - MHz
RS XTAL Serial Resistance - 15 40 Ohms
C0 XTAL Shunt Capacitance - 1.5 3 pF
CFOOT External Foot Capacitance On each pin XTA and XTB 8 15 22 pF
CLOAD Crystal Load Capacitance 6 - 12 pF
Wait for
10 ms
VDD
Pin 6
(output)
Chip is ready from
this point on
Undefined