Datasheet

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SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
7.3.1.2. Sequencer Configuration
The following graph shows Listen mode - Wake on PreambleDetect state machine:
Figure 51. Wake On PreambleDetect State Machine
This example configuration is achieved as follows:
Table 43 Listen Mode with PreambleDetect Condition Settings
T
Timer2
defines the maximum duration the chip stays in Receive mode as long as no Preamble is detected. In order to
optimize power consumption Timer2 must be set just long enough for Preamble detection.
T
Timer1
+ T
Timer2
defines the cycling period, i.e. time between two Preamble polling starts. In order to optimize average
power consumption, Timer1 should be relatively long. However, increasing Timer1 also extends packet reception duration.
In order to insure packet detection and optimize the receiver's power consumption the received packet Preamble should be
as long as T
Timer1
+ 2 x T
Timer2
.
An example of DIO configuration for this mode is described in the following table:
Table 44 Listen Mode with PreambleDetect Condition Recommended DIO Mapping
Variable Effect
IdleMode 1: Sleep mode
FromStart 00: To LowPowerSelection
LowPowerSelection 1: To Idle state
FromIdle 1: To Receive state on
T1 interrupt
FromReceive 110: To Sequencer Off on
PreambleDetect interrupt
DIO Value Description
001CrcOk
1 00 FifoLevel
300FifoEmpty
4 11 PreambleDetect – Note:
MapPreambleDetect bit should be set.
State Machine
LowPower
Selection
Idle
Receive
LowPowerSelection = 1
On T2
On T1
FromIdle = 1
On PreambleDetect
FromReceive = 110
Sequencer Off
IdleMode = 1 : Sleep
Start
Sequencer Off
&
Initial mode = Sleep or Standby
Start bit set
FromStart = 00