Datasheet

Table Of Contents

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SX1272/73

WIRELESS, SENSING & TIMING DATASHEET

Rev. 2 - July 2014

3. SX1272/73 Features

This section gives a high-level overview of the functionality of the SX1272/73 low-power, highly integrated transceiver. The

following figure shows a simplified block diagram of the SX1272/73.

Figure 4. Simplified SX1272 Block Schematic Diagram

SX1272/73 Is a half-duplex, low-IF transceiver. Here the received RF signal is first amplified by the LNA. The LNA input is

single ended to minimize the external BoM and for ease of design. Following the LNA output, the conversion to differential

is made to improve the second order linearity and harmonic rejection. The signal is then down-converted to in-phase and

quadrature (I&Q) components at the intermediate frequency (IF) by the mixer stage. A pair of sigma delta ADCs then

perform data conversion, with all subsequent signal processing and demodulation performed in the digital domain. The

digital state machine also controls the automatic frequency correction (AFC), received signal strength indicator (RSSI) and

automatic gain control (AGC). It also features the higher-level packet and protocol level functionality of the top level

sequencer (TLS).

The frequency synthesizer generates the local oscillator (LO) frequency for both receiver and transmitter. The PLL is

optimized for user-transparent low lock time and fast auto-calibrating operation. In transmission, frequency modulation is

performed digitally within the PLL bandwidth. The PLL also features optional prefiltering of the bit stream to improve

spectral purity.

SX1272/73 feature a pair of RF power amplifiers. The first, connected to RFO, can deliver up to +14 dBm, is unregulated

for high power efficiency and can be connected directly to the RF receiver input via a pair of passive components to form a

single antenna port high efficiency transceiver. The second PA, connected to the PA_BOOST pin, can deliver up to

+20

dBm via a dedicated matching network.

SX1272/73 also includes two timing references, an RC oscillator and a 32 MHz crystal oscillator.

All major parameters of the RF front end and digital state machine are fully configurable via an SPI interface which gives

access to SX1272/73’s configuration registers. This includes a mode auto sequencer that oversees the transition and

calibration of the SX1272/73 between intermediate modes of operation in the fastest time possible.