Datasheet
Table Of Contents
- 1. General Description
- 2. Electrical Characteristics
- 3. SX1272/73 Features
- 4. SX1272/73 Digital Electronics
- 4.1. The LoRaTM Modem
- 4.2. FSK/OOK Modem
- 4.2.1. Bit Rate Setting
- 4.2.2. FSK/OOK Transmission
- 4.2.3. FSK/OOK Reception
- 4.2.4. Operating Modes in FSK/OOK Mode
- 4.2.5. General Overview
- 4.2.6. Startup Times
- 4.2.7. Receiver Startup Options
- 4.2.8. Receiver Restart Methods
- 4.2.9. Top Level Sequencer
- 4.2.10. Data Processing in FSK/OOK Mode
- 4.2.11. FIFO
- 4.2.12. Digital IO Pins Mapping
- 4.2.13. Continuous Mode
- 4.2.14. Packet Mode
- 4.2.15. io-homecontrol® Compatibility Mode
- 4.3. SPI Interface
- 5. SX1272/73 Analog & RF Frontend Electronics
- 6. Description of the Registers
- 7. Application Information
- 8. Packaging Information
- 9. Revision History
www.semtech.comPage 28
SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
The header is transmitted with maximum error correction code (4/8). It also has its own CRC to allow the receiver to
discard invalid headers.
In Explicit Header Mode the presence of the payload CRC selected on the transmit side through the use of the bit
RxPayloadCrcOn locatind in the register RegModemConfig1.
The corresponding bit (RxPayloadCrcOn) is hence unused on the receive side. Instead, upon reception of the payload,
may consult the bit CrcOnPayload in the register RegHopChannel. If the bit CrcOnPayload is at ‘1’ then the user should
then check the Irq Flag PayloadCrcError to ensure that the CRC is valid.
If the bit CrcOnPayload is at ‘0’, it means there was no CRC on the payload and thus the IRQ Flag PayloadCrcError will not
be trigged in the event of payload errors.
Implicit Header Mode
In certain scenarios, where the payload, coding rate and CRC presence are fixed or known in advance, it may be
advantageous to reduce transmission time by invoking implicit header mode. In this mode the header is removed from the
packet. In this case the payload length, error coding rate and presence of the payload CRC must be manually configured
on both sides of the radio link.
Note that with SF = 6 selected implicit header mode is the only mode of operation possible.
To avail of the payload CRC in Implicit Header Mode, it is necessary to set the bit RxPayloadCrcOn in the register
RegModemConfig1 on both sides (TX and RX).
Low Data Rate Optimization
Given the potentially long duration of the packet at high spreading factors the option is given to improve the robustness of
the transmission to variations in frequency over the duration of the packet transmission and reception. The bit
LowDataRateOptimize increases the robustness of the LoRa link at these low effective data rates, its use is mandated with
spreading factors of 11 and 12 at 125 kHz bandwidth.
Explicit Header Transmitter Receiver CRC Status
Value of the bit
RxPayloadCrcOn
0 0 CRC is not checked
0 1 CRC is not checked
1 0 CRC is checked
1 1 CRC is checked
Implicit Header Transmitter Receiver CRC Status
Value of the bit
RxPayloadCrcOn
0 0 CRC is not checked
0 1
CRC is always
wrong
1 0 CRC is not checked
1 1 CRC is checked