Datasheet
Table Of Contents
- 1. General Description
- 2. Electrical Characteristics
- 3. SX1272/73 Features
- 4. SX1272/73 Digital Electronics
- 4.1. The LoRaTM Modem
- 4.2. FSK/OOK Modem
- 4.2.1. Bit Rate Setting
- 4.2.2. FSK/OOK Transmission
- 4.2.3. FSK/OOK Reception
- 4.2.4. Operating Modes in FSK/OOK Mode
- 4.2.5. General Overview
- 4.2.6. Startup Times
- 4.2.7. Receiver Startup Options
- 4.2.8. Receiver Restart Methods
- 4.2.9. Top Level Sequencer
- 4.2.10. Data Processing in FSK/OOK Mode
- 4.2.11. FIFO
- 4.2.12. Digital IO Pins Mapping
- 4.2.13. Continuous Mode
- 4.2.14. Packet Mode
- 4.2.15. io-homecontrol® Compatibility Mode
- 4.3. SPI Interface
- 5. SX1272/73 Analog & RF Frontend Electronics
- 6. Description of the Registers
- 7. Application Information
- 8. Packaging Information
- 9. Revision History
www.semtech.comPage 56
SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
4.2.8.3. Automatic Restart when Packet Collision is Detected
In receive mode the SX1272/73 is able to detect packet collision and restart the receiver. Collisions are detected by a
sudden rise in received signal strength, detected by the RSSI. This functionality can be useful in network configurations
where many asynchronous slaves attempt periodic communication with a single a master node.
The collision detector is enabled by setting bit RestartRxOnCollision to 1.
The decision to restart the receiver is based on the detection of RSSI change. The sensitivity of the system can be adjusted
in 1 dB steps by using register RssiCollisionThreshold in RegRxConfig.
4.2.9. Top Level Sequencer
Depending on the application it may be desirable to be able to change the mode of the circuit according to a predefined
sequence without access to the serial interface. In order to define different sequences or scenarios a user-programmable
state machine called the Top Level Sequencer (herein reffered to as the Sequencer) can automatically control the chip
modes.
NOTE THAT THIS FUNCTIONALITY IS ONLY AVAILABLE IN FSK/OOK MODE.
The Sequencer is activated by setting the SequencerStart bit in RegSeqConfig1 to 1 in Sleep or Standby mode (called
initial mode).
It is also possible to force the Sequencer off by setting the Stop bit in RegSeqConfig1 to 1 at any time.
Note SequencerStart and Stop bit must never be set at the same time.
4.2.9.1. Sequencer States
As shown in the table below, with the aid of a pair of interrupt timers (T1 and T2), the sequencer can take control of the chip
operation in all modes.
Table 24 Sequencer States
Sequencer
State
Description
SequencerOff State
The Sequencer is not activated. Sending a SequencerStart command will launch it.
When coming from LowPowerSelection state, the Sequencer will be Off, whilst the chip will
return to its initial mode (either Sleep or Standby mode).
Idle State The chip is in low-power mode, either Standby or Sleep, as defined by IdleMode in
RegSeqConfig1. The Sequencer waits only for the T1 interrupt.
Transmit State The transmitter in on.
Receive State The receiver in on.
PacketReceived The receiver is on and a packet has been received. It is stored in the FIFO.
LowPowerSelection Selects low power state (SequencerOff or Idle State)