Datasheet

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Table of contents
SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
Figure 1. SX1272/73 Block Diagram ............................................................................................................................10
Figure 2. Pin Diagram ...................................................................................................................................................11
Figure 3. Package Marking ...........................................................................................................................................13
Figure 4. Simplified SX1272 Block Schematic Diagram ...............................................................................................21
Figure 5. LoRaTM Modem Connectivity .......................................................................................................................24
Figure 6. LoRaTM Packet Structure .............................................................................................................................27
Figure 7. Interrupts generated in the case of successful frequency hopping communication. .....................................30
Figure 8. LoRaTM data buffer ......................................................................................................................................31
Figure 9. Applied versus measured frequency offset and influence on PER. ..............................................................34
Figure 10. LoRaTM modulation transmission sequence. .............................................................................................35
Figure 11. LoRaTM receive sequence. ........................................................................................................................36
Figure 12. LoRaTM CAD flow .......................................................................................................................................40
Figure 13. Channel activity detection (CAD) time as a function of spreading factor. ...................................................41
Figure 14. Consumption Profile of the LoRa CAD Process ..........................................................................................42
Figure 15. OOK Peak Demodulator Description ...........................................................................................................45
Figure 16. Floor Threshold Optimization ......................................................................................................................46
Figure 17. Bit Synchronizer Description .......................................................................................................................47
Figure 18. Startup Process ...........................................................................................................................................51
Figure 19. Time to Rssi Sample ...................................................................................................................................52
Figure 20. Tx to Rx Turnaround ...................................................................................................................................53
Figure 21. Rx to Tx Turnaround ...................................................................................................................................53
Figure 22. Receiver Hopping ........................................................................................................................................54
Figure 23. Transmitter Hopping ....................................................................................................................................54
Figure 24. Timer1 and Timer2 Mechanism ...................................................................................................................58
Figure 25. Sequencer State Machine ...........................................................................................................................60
Figure 26. SX1272/73 Data Processing Conceptual View ...........................................................................................61
Figure 27. FIFO and Shift Register (SR) ......................................................................................................................62
Figure 28. FifoLevel IRQ Source Behavior ...................................................................................................................63
Figure 29. Sync Word Recognition ...............................................................................................................................64
Figure 30. Continuous Mode Conceptual View ............................................................................................................66
Figure 31. Tx Processing in Continuous Mode .............................................................................................................66
Figure 32. Rx Processing in Continuous Mode ............................................................................................................67
Figure 33. Packet Mode Conceptual View ...................................................................................................................68
Figure 34. Fixed Length Packet Format .......................................................................................................................69
Figure 35. Variable Length Packet Format ....................................................................................
...............................70
Figure 36. Unlimited Length Packet Format .................................................................................................................70
Figure 37. Manchester Encoding/Decoding .................................................................................................................74
Figure 38. Data Whitening Polynomial .........................................................................................................................75
Figure 39. SPI Timing Diagram (single access) ...........................................................................................................76