Datasheet
Table Of Contents
- 1. General Description
- 2. Electrical Characteristics
- 3. SX1272/73 Features
- 4. SX1272/73 Digital Electronics
- 4.1. The LoRaTM Modem
- 4.2. FSK/OOK Modem
- 4.2.1. Bit Rate Setting
- 4.2.2. FSK/OOK Transmission
- 4.2.3. FSK/OOK Reception
- 4.2.4. Operating Modes in FSK/OOK Mode
- 4.2.5. General Overview
- 4.2.6. Startup Times
- 4.2.7. Receiver Startup Options
- 4.2.8. Receiver Restart Methods
- 4.2.9. Top Level Sequencer
- 4.2.10. Data Processing in FSK/OOK Mode
- 4.2.11. FIFO
- 4.2.12. Digital IO Pins Mapping
- 4.2.13. Continuous Mode
- 4.2.14. Packet Mode
- 4.2.15. io-homecontrol® Compatibility Mode
- 4.3. SPI Interface
- 5. SX1272/73 Analog & RF Frontend Electronics
- 6. Description of the Registers
- 7. Application Information
- 8. Packaging Information
- 9. Revision History
www.semtech.comPage 81
SX1272/73
WIRELESS, SENSING & TIMING DATASHEET
Rev. 2 - July 2014
©2014 Semtech Corporation
The carrier frequency is programmed through RegFrf, split across addresses 0x06 to 0x08:
Note The Frf setting is split across 3 bytes. A change in the center frequency will only be taken into account when the
least significant byte FrfLsb in RegFrfLsb is written. This allows the potential for user generation of m-ary FSK at
very low bit rates. This is possible where frequency modulation is achieved by direct programming of the
programmed RF centre frequency. To enable this functionality set the FastHopOn bit of register RegPllHop.
5.3.4. RC Oscillator
All timing operations in the low-power Sleep state of the Top Level Sequencer rely on the accuracy of the internal low-
power RC oscillator. This oscillator is automatically calibrated at the device power-up not requiring any user input.
F
RF
F
STEP
Frf 23 0(,)×=