Data Sheet

MPU-6000/MPU-6050 Product Specification
Document Number: PS-MPU-6000A-00
Revision: 3.4
Release Date: 08/19/2013
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Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition.
SDA
SCL
S
START condition STOP condition
P
START and STOP Conditions
Data Format / Acknowledge
I
2
C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per
data transfer. Each byte transferred must be followed by an acknowledge (ACK) signal. The clock for the
acknowledge signal is generated by the master, while the receiver generates the actual acknowledge signal
by pulling down SDA and holding it low during the HIGH portion of the acknowledge clock pulse.
If a slave is busy and cannot transmit or receive another byte of data until some other task has been
performed, it can hold SCL LOW, thus forcing the master into a wait state. Normal data transfer resumes
when the slave is ready, and releases the clock line (refer to the following figure).
DATA OUTPUT BY
TRANSMITTER (SDA)
DATA OUTPUT BY
RECEIVER (SDA)
SCL FROM
MASTER
START
condition
clock pulse for
acknowledgement
acknowledge
not acknowledge
1 2 8 9
Acknowledge on the I
2
C Bus