Information

© 2005 Microchip Technology Inc. DS80251A-page 1
MCP23008
The MCP23008 parts you have received conform
functionally to the Device Data Sheet (DS21919C),
except for the anomalies described below.
All of the issues listed here will be addressed in future
revisions of the MCP23008 silicon.
1. Module: I
2
C™ Module
In silicon revision A1 and prior: The I
2
C may
detect its slave address (OPCODE) at the wrong
time in a data transfer and acknowledge (ACK) its
perceived OPCODE.
During normal operations, the MCP23008 expects
the byte immediately following a Start bit to be an
OPCODE. When the device is not addressed, it
should remain silent and not interfere with the bus.
However, the device continues to monitor the bus
and checks for an address match every 8 bits and
acknowledges (ACKs) if a match is detected.
While the device checks for a match every 8 bits,
every data byte transfer on the bus is 9 bits long,
causing the device’s matching routine to get out of
phase with the bus. Therefore, the false ACK could
occur in the data field as well as the ack field.
Work around
The issue was addressed and no longer
appears in silicon revision A2. See Appendix
B: “Silicon Revision History” to determine how
to identify the silicon revisions.
As long as there are no other devices on the bus,
or the data on the bus is known (and does not
cause a false match), the issue will not appear.
A hardware work around may be used which
disables the clock input to the MCP23008 when it
is not addressed.
Date Codes that pertain to this issue:
• Date code 0542 and earlier have the issue.
• Date code 0543 and later do not have the
issue.
Clarifications/Corrections to the Data
Sheet:
In the MCP23008 Data Sheet (DS21919C), the follow-
ing clarifications and corrections should be noted.
None.
MCP23008 Rev. A Silicon Errata