Datasheet
M54/M74HCT257
M54/M74HCT258
February 1993
HCT258 QUAD 2 CHANNEL MULTIPLEXER (3-STATE, INVERTING)
HCT257 QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
B1R
(Plastic Package)
ORDER CODES :
M54HCTXXXF1R M74HCTXXXM1R
M74HCTXXXB1R M74HCTXXXC1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
.HIGH SPEED
t
PD
= 16 ns (TYP.) at V
CC
=5V
.LOW POWER DISSIPATION
I
CC
=4µA (MAX.) at T
A
=25°C
.COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
.SYMMETRICAL OUTPUT IMPEDANCE
IOH =I
OL
= 6 mA (MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH
=t
PHL
.PIN AND FUNCTION COMPATIBLE
WITH 54/74LS257/258
DESCRIPTION
The M54/74HCT257 and the M54/74HCT258 are
high speed CMOS MULTIPLEXERs fabricated with
silicon gate C
2
MOS technology.
They have the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption.
These IC’s are composed of an independent 2-
channelmultiplexer with commonSELECT and EN-
ABLE INPUT.
The M54/74HCT258 is an inverting multiplexer
while the M54/74HCT257 is a non-inverting multi-
plexer. When the ENABLE INPUT is held ”High”,
outputs of both IC’sbecome high-impedance state.
If SELECTINPUTis held ”Low”, ”A” datais selected,
when SELECT INPUT is high ”H”, ”B” data is
chosen.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC
2
MOS systems with TTL and
NMOS components. They are also plug in replace-
HCT257
HCT258
1/12