Datasheet

M54HCT74
M74HCT74
February 1993
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
B1R
(Plastic Package)
ORDER CODES :
M54HCT74F1R M74HCT74M1R
M74HCT74B1R M74HCT74C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.HIGH SPEED
f
MAX
= 53 MHz (TYP.) AT V
CC
=5V
.LOW POWER DISSIPATION
I
CC
=2µA (MAX.) AT T
A
=25°C
.COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.SYMMETRICAL OUTPUT IMPEDANCE
I
OH
=I
OL
= 4 mA (MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH
=t
PHL
.PIN AND FUNCTION COMPATIBLE
WITH 54/74LS74
The M54/74HCT74 is a high speed CMOS DUAL D
TYPE FLOP WITH PRESET AND CLEAR fabri-
cated in silicon gate C
2
MOS technology. It has the
same high speed performance of LSTTL combined
with trueCMOSlowpower consumption. A signal on
the D INPUT is transferred to the Q OUTPUTduring
the positive going transition of the clock pulse.
CLEAR and PRESET are independent of the clock
and accomplished by alow on the appropriate input.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age. This integrated circuit has input and output
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are de-
signed to directly interface HSC
2
MOS systems with
TTL and NMOScomponents. They are also plug in
replacements for LSTTL devices giving a reduction
of power consumption.
DESCRIPTION
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