Operating instructions

11
o Residual noise (200Hz-20kHz):
< -145dBFS (-123dBu)
o Total Harmonic Distortion + Noise (measured at 1kHz):
-110dB, with +4dBu input
-114dB, with -10dBu input
D/A:
o Dynamic range (measured with -60dBFS = -38dBu output at 1kHz
(See Figure 7: D/A Dynamic Range on page 41)
122dB (A-weighted), 119dB (unweighted)
o Frequency response (relative to 1kHz):
+- 0.03dB, 10Hz to 20kHz @ Fs = 44.1kHz
+- 0.04dB, 10Hz to 20kHz @ Fs = 96kHz
o Phase response:
<0.5˚, 10Hz to 1kHz
-10˚ at 20kHz
o Residual noise (200Hz-20kHz):
< -145dBFS (-123dBu)
o THD+N (measured at 1kHz):
-98dB, with +4dBu output
-103dB, with -10dBu output
Clock
Sample Rate (internal):
44.1, 48, 88.2, 96, 176.4, 192 kHz
Sample rate (external):
+- 12.5% vari-speed lock at all rates
4x BNC Clock Outputs:
75 ohm
5V CMOS drive
2x BNC Clock Inputs:
75 ohm internal termination
AC coupled
1.2V(p-p) minimum
5V(p-p) maximum, 50mA maximum over-voltage current (20 ohms/volt)
BNC Clock In to Clock Out Delay:
50ns maximum
Negative edge aligned when synchronized at multiple or submultiple rate