Operating instructions

26
Sample Rate Knob Setting
44.1 48 88.2 96 176.4 192
44.1 44.1 44.1 88.2 88.2 176.4 176.4
48 48 48 96 96 192 192
88.2 44.1 44.1 88.2 88.2 176.4 176.4
96 48 48 96 96 192 192
176.4 44.1 44.1 88.2 88.2 176.4 176.4
Incoming
Clock Rate
192 48 48 96 96 192 192
Table 6: Sample Rates with External Clocking
Important: When AES/SPDIF is selected as the clock source, the Sample Rate knob is
ignored and the internal sampling rate is determined by the AES/EBU or S/PDIF digital
input (see Table 4 on page 24).
Clock Status Lamp
When the 2192 is locked (synchronized) to a clock source, the Clock Status lamp glows green. The
lamp glows red when the clock is not locked. The clock must be locked for proper A/D and D/A
conversions and transcoding.
The clock is always locked when the Clock knob (page 23) is set to Internal. For the clock to be
locked when the clock source is external, a clock signal must be present at the input selected by the
Clock knob.
Note: After the Power Switch is turned on, the Clock Status lamp stays off for about 12 seconds
while the 2192 power conditioner and analog conversion circuits perform their initial calibrations.
Important: If the clock won’t lock when Clock is set to an external source, verify that the
external device is connected to the proper digital input and that it is transmitting a clock
signal.
Analog Outputs DAC Source Select
The Analog Outputs knob specifies the digital source for the D/A converters and the analog
outputs.
AES/SPDIF In
When the Analog Outputs knob is set to AES/SPDIF In, either the AES/EBU or the S/PDIF digital
input signal is routed to the D/A converters and analog outputs, depending on the position of the
AES/SPDIF switch (page 27).
Important: At this setting, the digital signal (AES or S/PDIF) routed to the analog outputs
is determined by the AES/SPDIF switch.