User's Manual

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Figure 1: Board Overview
Block Diagram
The UP100 LoRaWAN gateway module is equipped with one SX1303 chip and two SX1250s. The
first chip is utilized for the RF signal and the core of the device, while the latter provides the
related LoRa modem and processing functionalities. Additional signal conditioning circuitry is
implemented for PCI Express Mini Card compliance, and one UFL connectors are available for
external antenna integration.
Figure 2: Block Diagram