User`s guide

The steps indicated in Example 2-1 are outlined below:
o
o
e
These are console self-test flags.
This
is the console program release version.
The boot block instructions are executed by the console microprocessor. They load the file
CONSOL.EXE from the console tape cartridge in the TU58 drive unit into the CPU writeable
control store
(WCS). The console prompt (»» is printed. The indirect command file POW-
ER.CMD is accessed on the cartridge. The commands within this file are performed.
a. Load the basic console microcode from the file
CONSLE.CPU into the CPU WCS
starting at microaddress O.
b. Load the memory management, interrupts, and exceptions microcode from the file
MMIE.CPU into the CPU WCS starting at microaddress 0800 (hex).
c. Load the initializing microcode from the file POWER.CPU into the CPU WCS starting
at microaddress OEOO (hex).
d.
Start the CPU microcode running at microaddress OB (hex). This microcode jumps to the
INIT sequence at microaddress OEOO (hex). The CPU is initialized, the first 64KB of
good main memory
is found, and the presence of the internal disk controller (IDC) and the
floating-point accelerator
(FP A) is noted.
e. The console microprocessor waits for the CPU initialization sequence to be completed.
o The indirect command file CODEO I.CMD is accessed on the cartridge. The commands within
this file are now performed.
These commands load the microcode from the files
on the cartridge into CPU WCS starting at
the addresses shown below:
Step File Name CPU WCS Address (hex)
3a
FP.CPU OEOO
3b
BITFLD.CPU IAOO
3c
CM.CPU
1000
3d BASIC. CPU
2200
3e
QUEUE. CPU 3BOO
3f
IDC.CPU
4000
2-8