User`s guide

How the MACRO Compiler Functions on Different Platforms
2.10 Using Floating-Point Instructions
On OpenVMS I64 systems, the first parameters are passed not in registers
R16 through R21, but in registers R32 through R39. Thus, there are eight
rather than six argument registers. Also, on OpenVMS I64, the MACRO-
32 compiler does not provide a way to refer to these registers by name.
Therefore, there is no opportunity to write conflicting uses of these registers.
On OpenVMS Alpha systems, to prevent problems with AP-based references
when floating-point instructions are used, it is simplest to specify /HOME_
ARGS=TRUE on the entry point of the routine that contains these references.
This forces all AP-based references to be read from the procedure frame,
rather than the argument registers, so that no changes need to be made to
the instructions.
If /HOME_ARGS=TRUE is not used, the source code that contains parameter
references based on the AP register as operands to floating-point instructions
should be changed. Copy any AP-based operand to a temporary register
first, and use that temporary register in the floating-point instruction. For
example, change the following code:
MOVF @8(AP), @4(AP)
to:
MOVL 8(AP), R1
MOVL 4(AP), R2
MOVF (R1),(R2)
Note that, on OpenVMS I64 systems, the incoming argument registers are
disjoint from the outgoing argument registers.
• D_floating format on OpenVMS Alpha systems
D_floating format is not fully supported in the Alpha architecture. All
arithmetic operations or conversions must be done by converting D_floating
format to G_floating format, doing the operation in G_floating format, and
converting back to D_floating format. This results in the loss of the extra
3 bits of precision in the D_floating format mantissa, besides taking the
time in conversion. This means that there is nothing to be gained by using
D_floating format. It is available for compatibility only, with the caveat that
some precision will be lost.
• VAX floating-point formats on OpenVMS I64 systems
Since the Itanium architecture only supports IEEE S and T formats, all
arithmetic operations or conversions must be done by converting D_floating
and G_floating format to T_floating format, doing the operation in T_floating
format, and converting back to D_floating or G_floating format. This results
in the loss of the extra 3 bits of precision in the D_floating format mantissa,
besides taking the time in conversion. This means that there is nothing to be
gained by using D_floating format. It is available for compatibility only, with
the caveat that some precision will be lost. Likewise, all F_floating operations
are done by converting to S_floating, doing the operation, and converting back
to F_floating.
• Overflow traps
It is not possible to enable traps on integer overflow or floating-point
underflow. Alpha systems will always trap on floating-point overflow. The
/ENABLE qualifier and the .ENABLE directive have no effect on overflow
trapping. Overflow traps that lead to predictable results on OpenVMS VAX
systems will give the same results on OpenVMS Alpha and OpenVMS I64
systems.
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