User`s guide

Recommended and Required Source Changes
3.10 Locking Pages into a Working Set
Table 3–3 Image Initialization-Time Lockdown with the Same Code
Code Section On VAX Systems On Alpha Systems
Initialization
Nothing.
$LOCK_PAGE_INIT
Main code
Routine_A:
.
.
.
SETIPL 100$
.
.
.
RSB
100$: .LONG IPL$SYNCH
$LOCKED_PAGE_START
Routine_A:
.JSB_ENTRY
.
.
.
RSB
$LOCKED_PAGE_END
3.11 Synchronization
The following information about synchronization is relevant when porting code
from OpenVMS VAX to OpenVMS Alpha or OpenVMS I64 systems:
• Code that issues longword operations to aligned longwords in memory
continues to work on Alpha and Itanium systems without additional
synchronization required. This is architecturally guaranteed.
The Alpha and Itanium architecture extends this guarantee to include
quadword operations to aligned quadwords in memory. However, this is not
backwards-compatible to VAX systems. Only Alpha or Itanium code can
depend on this feature.
• Interlocked instructions (BBSSI, BBCCI, and ADAWI) still work. However,
keep the following in mind when you use them:
When compiling these instructions, the MACRO compiler provides
memory barrier functionality implicitly.
These instructions assume a byte granularity environment. If the data
segment on which these instructions operate can be concurrently written
by different threads, you may need to impose additional synchronization
of the data segment using the MACRO compiler’s PRESERVE feature.
Another way to address the byte granularity problem and achieve greater
performance at the same time is to restructure the data segments to be
unpacked. That is, the bit that is changed by BBSSI or BBCCI, or the
word that is modified by ADAWI, should reside in a longword where the
other portions of the longword are not modified by an independent and
concurrent instruction thread.
Further separation of the data in question, such that independent
and concurrent access to any location in the aligned 128-byte lock
range that contains the data is not occurring, will result in additional
performance gains on many Alpha implementations of the Load-
locked/Store-conditional instructions.
• The VAX interlocked queue instructions work unchanged on OpenVMS Alpha
or OpenVMS I64 systems and result in the PALcode equivalents being called
which incorporate the necessary interlocks and memory barriers.
Recommended and Required Source Changes 3–23