Technical data

VAX 6000 Series Vector Processor
2.1 OVERVIEW
The FV64A vector processor is a single-board option that implements the
VAX vector instruction set. This module requires a scalar CPU module
for operation. The scalar/vector pair implement the VAX instruction set
plus the VAX vector instructions. Figure 2–1 is a block diagram of the
scalar/vector pair. The vector processor occupies a slot adjacent to the
scalar CPU on the XMI. The two processors are connected by the vector
interface bus (VIB) cable.
The C-chip on the scalar module provides the operand and control
interface between the scalar CPU and the vector module. This interface is
used to issue vector instructions to the vector module, which then executes
the instruction, including all memory references necessary to load or store
vector registers. The vector processor receives all instructions and returns
status to the scalar CPU across the VIB. For memory references, the
vector processor has its own independent path to main memory.
The system supports multiple scalar CPUs with a single scalar/vector pair.
For a single scalar/vector pair, two memory controllers are required. It
also supports a dual scalar/vector pair, for which four memory controllers
are required to support the memory traffic.
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