Technical data
VAX 6000 Series Vector Processor
Once a load or store (or scatter or gather) instruction is issued, no further
instructions may be issued until a Memory Management Okay (MMOK)
is received. The scalar unit is also stalled until the MMOK is received.
Chapter 3 suggests certain coding techniques to minimize the impact of
this behavior as much as possible.
2.9.3 Arithmetic Unit
The arithmetic unit is composed of two parts: the vector ALU and the
vector FPU. The FPU performs all floating-point instructions as well as
compare, shift, and integer multiply. (There is no integer divide vector
instruction.) The ALU does everything else, including merge and logical
instructions and all initial instruction handling.
The ALU receives instructions from the vector issue unit. One instruction
may be queued while another instruction is executing in the arithmetic
unit. A queued (or deferred) instruction begins executing as soon as any
current instruction completes. Some overlap of instructions is possible
if both the current and the deferred instructions require the FPU and
are not divide instructions. Also, the second instruction must not begin
outputting results before the first instruction completes.
The ALU decodes the instruction and determines the type of operation
requested (see Figure 2–11). If the instruction is a Boolean or merge
instruction, the ALU performs the required operation. Floating-point
instructions, as well as integer, compare, and shift instructions, are sent
to the vector FPU for execution.
Once an instruction begins execution in the arithmetic unit, the number
of cycles delay (startup time) before the first results are returned depends
on the particular instruction executed. With the exception of any type
of divide, all instructions return new results each cycle for single-
precision data, or every other cycle for double-precision data, following
the return of the first results. The total number of cycles required for
an instruction to complete depends on the length of the vector and the
particular instruction.
2–19