Technical data

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3.3 SCALAR/VECTOR SYNCHRONIZATION
For most cases, it is desirable for a vector processor to operate
concurrently with the scalar processor so as to achieve best performance.
However, there are cases where the operation of the vector and scalar
processors must be synchronized to ensure correct program results.
Rather than forcing the vector processor to detect and automatically
provide synchronization in these cases, the architecture provides software
with special instructions to accomplish the synchronization. These
instructions synchronize the following:
• Exception reporting between the vector and scalar processors
• Memory accesses between the scalar and vector processors
• Memory accesses between multiple load/store units of the vector
processor
Software must determine when to use these synchronization instructions
to ensure correct results.
3.3.1 Scalar/Vector Instruction Synchronization (SYNC)
A mechanism for synchronization between the scalar and vector
processors is provided by the SYNC instruction, which is implemented by
a Move From Vector Processor (MFVP) instruction. SYNC allows software
to ensure that the exceptions of previously issued vector instructions are
reported before the scalar processor proceeds with the next instruction.
SYNC detects both arithmetic exceptions and asynchronous memory
management exceptions and reports these exceptions by taking the
appropriate VAX instruction fault. Once it issues the SYNC, the scalar
processor executes no further instructions until the SYNC completes or
faults.
When SYNC completes, a longword value (which is unpredictable) is
returned to the scalar processor. The scalar processor writes the longword
value to the scalar destination of the MFVP instruction and then proceeds
to execute the next instruction.
When SYNC faults, it is not completed by the vector processor, and the
scalar processor does not write a longword value to the scalar destination
of the MFVP instruction. Also depending on the exception condition
encountered, the SYNC itself takes either a vector processor disabled
fault or memory management fault. After the appropriate fault has been
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