Specifications

TURBOchannel Bus Support
12.2 TURBOchannel on DEC 3000 Model 500
• To read a longword from an option register, use a LDL to the sparse space
address.
• To write a longword to an option register, use a STL to either the dense or
sparse space address.
• To write 1-3 bytes to an option register, use a STQ to the sparse space
address with the appropriate mask bits set in the upper longword of the
data quadword (mask bit equal to a 1 causes corresponding data byte to be
written).
• LDL or LDQ to a dense space address always results in two TURBOchannel
I/O read transactions to consecutive longword addresses Use caution in dense
space if the option has registers with read side effects.
• STQ to a dense space address causes two TURBOchannel I/O write
transactions to consecutive longword addresses. This may result in writing
more data than intended.
12.2.3 DEC 3000 Model 500 TURBOchannel Register Access
DEC 3000 Model 500 does not implement hardware mailboxes for I/O register
access. To reference a TURBOchannel option module register, the option slot
address space must be mapped into the processors’ virtual address space. The
option registers can then be accessed using load or store instructions. This is an
example of direct register access.
However, the OpenVMS AXP mailbox data structures and routines can still be
used for I/O register access. The following sections give examples of how to access
registers directly or through CRAMs.
12.2.3.1 Direct Register Access on DEC 3000 Model 500 TURBOchannel
On DEC 3000 Model 500, a programmer can access registers directly, use the
OpenVMS AXP CRAM routines, or use IOC$READ_IO and IOC$WRITE_IO.
For direct access, the programmer must decide in which space (sparse or dense)
to map the registers. Then, registers can be accessed using load and store
instructions.
Consider the previous example of the option with two registers. To access these
registers in dense space, the programmer should map the option into virtual
address space as shown in Figure 12–4.
Figure 12–4 Option Register Layout—Dense Space
Option Register Layout − Dense Space
031
register A
register B
1 0004 0000
1 0004 0004
ZK−6715A−GE
physical addressvirtual address
base VA
base VA + 4
Register A and B now can be accessed in a number of ways, with somewhat
different results. In the following examples, assume the base VA has been loaded
into register R0. A.LDL R1, (R0)
12–4