Specifications

TURBOchannel Bus Support
12.2 TURBOchannel on DEC 3000 Model 500
To set up a CRAM for a read to register B, call IOC$CRAM_CMD as follows:
status = ioc$cram_cmd (cramcmd$k_rdlong32,
4,
adp_address,
cram_address);
IOC$CRAM_CMD longword aligns the byte offset parameter, multiplies the
aligned byte offset by 2 (to account for sparse space) and adds the result to the
value from IDB$Q_CSR. In this example the resulting address would be "base
VA+8". To perform the actual read, issue a call to IOC$CRAM_IO. The data from
register B will be returned in the RDATA field of the CRAM. To set up a CRAM
for a longword write to register B, call IOC$CRAM_CMD as follows:
status = ioc$cram_cmd (cramcmd$k_wtlong32,
4,
adp_address,
cram_address);
/* Load the CRAM WDATA field with the data to be
written. */
IOC$CRAM_CMD longword aligns the byte offset parameter, multiplies the
aligned byte offset by 2 (to account for sparse space) and adds the result to the
value from IDB$Q_CSR. In this example the resulting address would be "base
VA+8". A subsequent call to IOC$CRAM_IO will cause a STL using the WDATA
field of the CRAM as the write data, to the address in RBADR (which is "base
VA+8").
Now suppose that the programmer wants to write byte 3 of register A without
affecting bytes 0, 1, or 2. To set up a CRAM for this operation, call IOC$CRAM_
CMD as follows:
status = ioc$cram_cmd (cramcmd$k_wtbyte32,
3,
adp_address,
cram_address);
/* Now load the CRAM WDATA field with the data to be
written. */
In the previous example, IOC$CRAM_CMD will form RBADR by longword
aligning the byte offset and multiplying it by 2, then adding the result to the
value from IDB$Q_CSR. In this example the resulting address will be "base VA".
IOC$CRAM_CMD will use the command index (wtbyte32) and the byte offset
to form a mask of 1000 (binary). This mask will be copied to bits 35:32 of the
WDATA field. To perform the actual write, issue a call IOC$CRAM_IO.
status = ioc$cram_io (cram_address);
IOC$CRAM_IO will generate a STQ using the WDATA field as the write data,
to the address in the RBADR field in the CRAM. Since bits 35:32 of the WDATA
field contain a mask of 1000 (binary), only byte 3 of register A will actually be
written. You can also use the device register access routines IOC$READ_IO
and IOC$WRITE_IO to do this. For more information about these routines, see
Appendix A.
12–8