Specifications

TURBOchannel Bus Support
12.2 TURBOchannel on DEC 3000 Model 500
The programmer then initializes the CRCTX$L_ITEM_CNT field of the CRCTX
with the requested number of Scatter/Gather entries. The caller must request
two more entries than required to actually map the DMA buffer, since the second
to last entry of a request is always initialized to point to the black hole page (from
EXE$GL_BLAKHOLE), and the last entry of a request is always initialized to
zero to protect against runaway transfers.
To allocate the Scatter/Gather entries, the programmer calls IOC$ALLOC_CNT_
RES, as follows:
status = ioc$alloc_cnt_res (crab_address, /* Address of CRAB */
crctx_address); /* Address of CRCTX */
On DEC 3000 Model 500, the requested number of Scatter/Gather map entries
(from CRCTX$L_ITEM_CNT) is rounded up to a multiple of 16, so that Scatter
/Gather entries are are always allocated in multiples of 16. The reason for
this is to lessen the management overhead in the CRAB. IOC$ALLOC_CNT_RES
returns the item number of the first allocated resource in CRCTX$L_ITEM_NUM.
For a complete description of IOC$ALLOC_CRCTX and IOC$ALLOC_CNT_RES,
see OpenVMS AXP Device Support: Reference.
12.2.3.8 Loading Scatter/Gather Map Entries
After the Scatter/Gather entries have been allocated, they must be loaded such
that they properly map the DMA buffer in system memory. This is accomplished
by a call to IOC$LOAD_MAP, as follows:
status = ioc$load_map (adp_address, /* Address of Turbo ADP */
crctx_address, /* Address of CRCTX */
svapte, /* System virtual address of PTE */
/* for first page of DMA buffer */
boff, /* Byte offset into first page of */
/* DMA buffer */
dma_addr_ref); /* Address of location to receive */
/* TURBOchannel DMA address */
IOC$LOAD_MAP uses the CRCTX$L_ITEM_NUM field to find the first Scatter
/Gather entry that has been allocated, and then initializes the Scatter/Gather
entries based on the starting system virtual address of the DMA buffer. The
DMA address is written to the location specified by dma_addr_ref. Note that the
DMA address is a full byte address–the lower two bits must be cleared before the
address is written to a TURBOchannel option DMA address register.
12.2.4 DEC 3000 Model 500/TURBOchannel Interface Registers
DEC 3000 Model 500 provides two registers that provide control over the
characteristics of a TURBOchannel slot. These registers are the IOSLOT register
and the IMASK register. The IOSLOT register, on a per-slot basis, enables
or disables Scatter/Gather map usage and TURBOchannel parity generation
and checking. The IMASK register, on a per-slot basis, enables or disables the
delivery of TURBOchannel interrupts to the processor.
OpenVMS AXP provides access to these registers via the IOC$NODE_
FUNCTION routine.
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