Specifications

PCI Bus Support
13.7 Register Access on PCI Buses
13.7 Register Access on PCI Buses
To access registers on a PCI device, you must first determine the PCI physical
address that is assigned to the device and then map the PCI physical address
into the processor’s virtual address space. Then you can access the device using
the platform independent access routines IOC$READ_IO or IOC$WRITE_IO, or
using the CRAM data structure and associated routines IOC$CRAM_CMD and
IOC$CRAM_IO.
13.8 Finding the PCI Physical Addresses Assigned to a Device
As mentioned previously, a PCI device may implement up to 6 Base Address
registers in its Configuration Space header. On Digital AXP platforms, the
console assigns PCI address space to each PCI device by writing a PCI physical
address into a Base Address register.
OpenVMS AXP provides two routines for PCI Configuration space access. The
prototypes for these routines are:
int ioc$read_pci_config (ADP *pci_adp,
int pci_node,
int offset,
int length,
int *data)
and
int ioc$write_pci_config (ADP *pci_adp,
int pci_node,
int offset,
int length,
int data)
Inputs:
pci_adp Address of PCI ADP. Available to driver from
IDB$PS_ADP.
pci_node PCI node number. Function number in bits 2:0,
device number in bits 7:3, bus number in bits
15:8. Available to driver from CRB$L_NODE.
(driver must be loaded with /NODE qualifier).
offset Byte offset in Configuration space of field to
be read or written.
length Length of data field (expressed in bytes) to be
read or written. Must be 1 (byte), 2 (word), 3
(tribyte), or 4 (longword).
data For reads, a pointer to a longword cell to be
written with the data read from Configuration
space. For writes, a longword containing the data
to be written to Configuration space.
Outputs:
SS$_NORMAL Success. For reads, data is returned in the
caller’s buffer. For writes, data is written
to PCI Configuration space.
SS$_BADPARAM Failure. Could not find Configuration space
address for the specified PCI node number.
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